Section 3: Test subroutine library reference
S530 Parametric Test System Test Subroutine Library User's Manual
3-18
S530-907-01 Rev. A / September 2015
Details
This subroutine measures the drain-to-source breakdown voltage of a field-effect transistor (FET) with
the gate grounded with the source, at a specified current (magnitude and polarity).
If a positive substrate pin is specified, the substrate is grounded. If a positive substrate pin is not
specified, the substrate is left floating.
A delay is incorporated into the bvdss subroutine; this delay is the calculated time required for stable
forcing of
ipgm
within the
vlim
voltage limit.
V/I polarities
N-cIpgm
P-channel -Ipgm
Source-measure units (SMUs)
SMU1: Forces
ipgm
, programmed voltage limit, measures
bvdss
Example
result = bvdss(d, g, s, sub, ipgm, vlim);
Schematic