JVC XV-521BK, Руководство по обслуживанию

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XV-521BK/523GD/522SL
1-47
Pin No.
Symbol
I/O
Function
ZIVA3-PEO (3/5)
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
Memory address.
3.3-V supply voltage for I/O signals.
Memory address.
Ground for core logic and I/O signals.
Memory address.
3.3-V supply voltage for I/O signals.
Memory address.
Ground for core logic and I/O signals.
Memory address.
3.3-V supply voltage for I/O signals.
No Connection
Ground for core logic and I/O signals.
No Connection
2.5-V supply voltage for core logic.
No Connection
Ground for core logic and I/O signals.
No Connection
3.3-V supply voltage for I/O signals.
No Connection
Ground for core logic and I/O signals.
No Connection
Open drain signal, must be pulled-up via 4.7kW to 3.3 volts.
Programmable I/O pins. Input mode after reset.
No Connection
Tie to VSS or VDD-3.3
Programmable I/O pins. Input mode after reset.
3.3-V supply voltage for I/O signals.
Tie to VSS or VDD-3.3
Ground for core logic and I/O signals.
Tie to VSS or VDD-3.3
Programmable I/O pins. Input mode after reset.
Tie to VSS or VDD-3.3
Programmable I/O pins.Input mode after reset.
Video data bus. Byte serial CbYCrY data synchronous with VCLK. At power-up,
the decoder does not drive VDATA. During boot-up, the decoder uses configuration
parameters to drive or 3-state VDATA
2.5-V supply voltage for core logic.
Video data bus. Byte serial CbYCrY data synchronous with VCLK. At power-up,
the decoder does not drive VDATA. During boot-up, the decoder uses configuration
parameters to drive or 3-state VDATA
Ground for core logic and I/O signals.
Programmable I/O pins. Input mode after reset.
Video data bus. Byte serial CbYCrY data synchronous with VCLK. At power-up,
the decoder does not drive VDATA. During boot-up, the decoder uses configuration
parameters to drive or 3-state VDATA
O
-
O
-
O
-
O
-
O
-
O
-
O
-
O
-
O
-
O
-
O
O
I/O
O
I
I/O
-
I
-
I
I/O
I
I/O
O
-
O
-
I/O
O
MADDR8
MADDR10
VDD-3.3
MADDR7
VSS
MADDR0
MADDR6
MADDR1
VDD-3.3
MADDR5
VSS
MADDR2
MADDR4
MADDR3
VDD-3.3
NC
VSS
NC
VDD-2.5
NC
VSS
NC
VDD-3.3
NC
VSS
NC
RESERVED
PIO2
NC
RESERVED
PIO3
VDD-3.3
RESERVED
VSS
RESERVED
PIO4
RESERVED
PIO5
VDATA0
VDATA1
VDD-2.5
VDATA2
VSS
PIO6
VDATA3