Configuration
It should be ensured that no other system component is occupying the selected
interrupt, except for cards which work with shared interrupts.
In PC systems it is possible that several cards share an interrupt. Further informa-
tion on this subject can be found in the hardware manuals for the PC. The
iPC-I 165 supports shared interrupts by enabling the level of the interrupt im-
pulses to be adjusted with switch 2 of the DIP switch SW3. For shared interrupts
the DIP switch SW3-2 must be set to OFF position.
IRQ level
SW3
2
Low impulse (default)
OFF
High impulse
ON
3.1.3 16 bit access mode
By setting the switch 5 of DIP switch SW1 to OFF, the 16 bit access for the
iPC-I 165 can be activated. Then iPC-I 165 will be accessed with 16 bit bus cycles
from the ISA bus. If the 16 bit access is switched off the interface is accessed with
8 bit wide bus cycles.
Access mode
SW1
5
16 bit (default)
OFF
8 bit
ON
3.1.4 Zero wait states
By setting the switch 6 of DIP switch SW1 to OFF, a shortened ISA bus cycle (0
wait states) can be activated. If SW1-6 is set to ON, the PC performs a standard
bus cycle.
Wait states
SW1
6
No wait states
OFF
With wait states (default)
ON
Copyright IXXAT Automation GmbH
iPC-I 165 - Manual, Version 2.3
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Содержание iPC-I 165
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