IWILL dca200, Руководство пользователя

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Chapter 5 BIOS Setup
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DCA200-N Series
When enabled, access to the video BIOS will be cached.
Options Enabled
Disabled (*)
5.5.5 Video RAM Cacheable
When enabled, access to the video memory located at A0000H to BFFFFH will be
cached.
Options Enabled
Disabled (*)
5.5.6 Memory Hole At 15M-16M
Some add-in cards need to re-map its resource to a block of main memory address
range. Any host cycles that match this memory hole are passed on to the add-in
cards.
Options Enabled
Disabled (*)
5.5.7 Delayed Transaction
When enabled, the south bridge PIIX4 will supports the Delayed Transaction mecha-
nism when it is the target of a PCI transaction. The PCI revision 2.1 compliant requires
this field to be enabled.
Options Enabled (*)
Disabled
5.5.8 AGP Aperture Size (MB)
This field specifies the size of system memory that can be used for AGP graphics
aperture.
Options 4 / 8 / 16 / 32 / 64 (*) / 128 / 256
5.6 Integrated Peripherals