
REL0.1
Page 45 of 58
i.MX8 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Interface/
Function
SMARC
Edge
Pin
Number
i.MX8M
CPU
Pin
Number
Function 0
Function 1
Function 2
Function 3
Function 4
Function 5
GPIO
Default
State
P41
P22
usdhc2.DATA2
gpio2.IO[17]
gpio2.IO[17]
usdhc2.DATA2
P42
P21
usdhc2.DATA3
gpio2.IO[18]
gpio2.IO[18]
usdhc2.DATA3
P37
R22
usdhc2.RESET_B
gpio2.IO[19]
gpio2.IO[19]
gpio2.IO[19]
P33
M21
usdhc2.WP
gpio2.IO[20]
gpio2.IO[20]
gpio2.IO[20]
P35
L21
usdhc2.CD_B
gpio2.IO[12]
gpio2.IO[12]
gpio2.IO[12]
QSPI
P54
F21
rawnand.CE2_B
qspi.B_SS0_B
gpio3.IO[3]
gpio3.IO[3]
qspi.B_SS0_B
P55
H20
rawnand.CE3_B
qspi.B_SS1_B
gpio3.IO[4]
gpio3.IO[4]
qspi.B_SS1_B
P56
H21
rawnand.CLE
qspi.B_SCLK
gpio3.IO[5]
gpio3.IO[5]
qspi.B_SCLK
S58
K19
rawnand.RE_B
qspi.B_DQS
gpio3.IO[15]
gpio3.IO[15]
gpio3.IO[15]
S56
L19
rawnand.DATA06
qspi.B_DATA[2]
gpio3.IO[12]
gpio3.IO[12]
qspi.B_DATA[2]
S57
M19
rawnand.DATA07
qspi.B_DATA[3]
gpio3.IO[13]
gpio3.IO[13]
qspi.B_DATA[3]
P58
L20
rawnand.DATA04
qspi.B_DATA[0]
gpio3.IO[10]
gpio3.IO[10]
qspi.B_DATA[0]
P57
J22
rawnand.DATA05
qspi.B_DATA[1]
gpio3.IO[11]
gpio3.IO[11]
qspi.B_DATA[1]
SPI
P44
D5
ecspi1.SCLK
uart3.RX
gpio5.IO[6]
gpio5.IO[6]
ecspi1.SCLK
P45
B4
ecspi1.MISO
uart3.CTS_B
gpio5.IO[8]
gpio5.IO[8]
ecspi1.MISO
P46
A4
ecspi1.MOSI
uart3.TX
gpio5.IO[7]
gpio5.IO[7]
ecspi1.MOSI
P43
D4
ecspi1.SS0
uart3.RTS_B
gpio5.IO[9]
gpio5.IO[9]
ecspi1.SS0
USB OTG1
P62
C14
USB1_ID
USB1_ID
P64
D14
USB1_VBUS
USB1_VBUS
P60
A14
USB1_DP
USB1_DP
P61
B14
USB1_DN
USB1_DN
S62
A13
USB1_TX_P
USB1_TX_P
S63
B13
USB1_TX_N
USB1_TX_N
S65
A12
USB1_RX_P
USB1_RX_P
S66
B12
USB1_RX_N
USB1_RX_N
PCIe
P89
J25
PCIE1_TXN_P
PCIE1_TXN_P
P90
J24
PCIE1_TXN_N
PCIE1_TXN_N
P86
H25
PCIE1_RXN_N
PCIE1_RXN_N
P87
H24
PCIE1_RXN_P
PCIE1_RXN_P
S90
E25
PCIE2_TXN_P
PCIE2_TXN_P
S91
E24
PCIE2_TXN_N
PCIE2_TXN_N
S87
D25
PCIE2_RXN_N
PCIE2_RXN_N