First Byte
Second Byte
oEnd
iDAV
iBusy
>50 ns
>150 ns
1) The external device waits for iBusy to be unasserted.
2) The external device presents data to the input port.
3) After at least 50 ns, the external device asserts iDAV until 150 ns have passed
or until iBusy is asserted.
4) The external device unasserts iDAV until at least 150 ns after iBusy is
unasserted.
Input Port Timing Diagram
3.2.2 /iRESET Control Line
The /iRESET control line provides a method by which the external device can force a
power-on reset of the Digital488HS/32. This line, normally pulled high by an internal
10k• pull-up resistor, causes the power-on reset sequence when forced to a low state.
The polarity (active level) of this control line is not switch selectable. iReset must be
held active for at least 2 ms to ensure proper reset.
3.2.3 Logic Supply Lines
Provisions have been made to allow the external device to be powered by the
Digital488HS/32 internal 5 volt logic supply. Care must be taken to assure that the
external circuit does not draw greater than 100 mA total (50 mA to each port).
3.2.4 Data Transfer Speed Considerations
The data transfer speeds on the IEEE 488 bus are affected by both the IEEE 488 bus
talker and the IEEE 488 bus listener. In fact, the data on the bus can only transfer as
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com