2.4.3 Device Clear (DCL and SDC)
In response to a DCL or SDC from the IEEE488 bus, the Digital488HS/32 pulses the
oClear control line for 1µsec. In addition, the input port is forced Empty and the
output port is forced to its power-on default value. For more information, see PTO
default switches,S4 and S5.
2.4.4 Group Execute Trigger (GET)
When the Digital488HS/32 recognizes a GET, the Digital488HS/32 pulses the
oTrigger control line for 1µsec.
2.4.5 Interface Clear (IFC)
IFC places the Digital488HS/32 in the Talker/Listener Idle State.
2.4.6 Serial Poll Enable (SPE)
When Serial Poll Enabled (SPE), the Digital488HS/32 sets itself to respond to a serial
poll with its serial poll status byte if addressed to talk. When the serial poll byte is
accepted by the controller, any pending SRQs are cleared. The Digital488HS/32
continues to try to output its serial poll response until it is Serial Poll Disabled (SPD)
by the controller.
2.4.7 Serial Poll Disable (SPD)
Disables the Digital488HS/32 from responding to serial polls by the controller.
2.4.8 Unlisten (UNL)
Unlisten (UNL) places the Digital488HS/32 in the Listener Idle State.
2.4.9 Untalk (UNT)
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com