IM483H/IM805H Rev. R032206
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57
IM483H/IM805H Rev. R032206
I s o l a t e d I n p u t s
The schematic illustrated in figure
A.6 shows the optically isolated
inputs to the INT-483H/805H and
associated circuitry.
J u m p e r S e t t i n g s
JP1:1-2: If the shunt is placed on the
“OPTO” side (between pins 1 & 2)
of the jumper, the power for the opto-
isolators (+5 to +24VDC) must be
provided by the user at P1:1.
JP1:2-3: If the shunt is placed on
the “+5V” side (between pins 2 &
3), then the opto-isolators will be powered by the on board +5V supply. If the
on-board supply is used to power the opto-isolators, electrical isolation between
drive power and the logic inputs will be lost.
NOTE: When using the on-board +5VDC supply (JP1:2-3)
to power the opto-isolators, electrical isolation between
drive/fan power and the logic inputs is defeated!
OPTO SUPPLY P1:1
(+5 TO +24 VDC)
STEP CLOCK P1:8
DIRECTION P1:7
ENABLE P1:6
RESET P1:5
HCPL-0630
HCPL-0630
HCPL-0630
CCLHM100
CCLHM100
CCLHM100
CCLHM100
2
1
3
JP1
+5VDC
Figure A.6: Opto Isolated Inputs
Figure A.5: Jumpers JP1 & JP2
JP2
JP1
ENON/ENOFF OPTO/+5V
M
S0
M
S1
M
S2
M
S3
SW
1
THIS SIDE “ON”
P
O
W
ER
FA
U
LT
FA
N
P
3
+5
V
2
1
JP2
JP1
ENON/ENOFF OPTO/+5V
1
1
2
2