System BIOS
SE7500CW2 Server Board Technical Product Specification
32
Revision 1.40
APIC configuration space, PCI adapter interface, and virtual video memory space. This
memory space is also lost if the system is populated with memory configurations
between max. 3.872 GB and 4 GB. This size has the ability to expand by 128MB multiples
if cards demand more space.
Note:
The minimum DIMM size is 128M, and it will expand automatically based on the PCI
Card resource claims.
The system BIOS supports registered DIMMs with CL=3 components and CL=2 components
when available.
•
The baseboard is hard-wired for dual channel memory support.
•
The system BIOS supports only Error Correcting Code (ECC) memory.
•
DIMMs must be populated in pairs with the same size. Memory timing defaults to the
slowest DIMM.
•
x4/x8 DIMM mixing Read Error Sighting.
All DIMMs must use SPD EEPROM or they will not be recognized by BIOS. Mixing vendors of
DIMMs will be supported, but is not recommended as the system will default to the slowest
speed that will work with all of the vendors.
The SE7500CW2 server BIOS is responsible for configuring and testing the system memory.
Configuring system memory involves probing the memory modules for their characteristics and
programming the chipset for optimum performance. The BIOS also verifies that the memory
subsystem is functional.
When the system comes out of reset, the main memory is not usable. The BIOS has knowledge
of the memory subsystem and it knows the type of memory, the number of DIMM sites, and their
locations.
6.2.1.1
Memory Configuration
The SE7500CW2 server board uses the Intel E7500 MCH chipset to configure the system
baseboard memory
The SE7500CW2 server BIOS is responsible for configuring and testing the system memory.
The configuration of the system memory involves probing the memory modules for their
characteristics and programming the chipset for optimum performance.
When the system comes out of reset, the main memory is not usable. The BIOS verifies that the
memory subsystem is functional. It has knowledge of the memory subsystem and it knows the
type of memory, the number of DIMM sites, and their locations.
6.2.1.2
Memory Sizing and Initialization
During POST, the BIOS tests and sizes memory, and configures the memory controller. The
BIOS determines the operational mode of the Intel E7500 based on the number of DIMMs
Содержание SE7500CW2
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Страница 41: ...SE7500CW2 Server Board Technical Product Specification Hardware Monitoring 29 Revision 1 40 ...
Страница 122: ...Appendix A SE7500CW2 Integration and Usage Tips SE7500CW2 Server Board Technical Product Specification CX Revision 1 40 ...