ix
8C Reserved
8D Reserved
8E Reserved
8F Reserved
90 Reserved
91 Reserved
92 Reserved
93 Boot
Medium
detection
Read and store boot partition head and
cylinders values in RAM
94
Final Init
Final init for last micro details
before boot
95
Special KBC patch
Set system speed for boot
Setup NumLock status according to
Setup
96
Boot Attempt
Set low stack
Boot via INT 19h.
FF Boot
Quick POST Codes
Code(hex) Name
Description
65
Init onboard device
Early Initialized the super IO
Reset Video controller
Keyboard controller init
Test the Keyboard Initialized the
mouse Onboard audio controller
initialize if exist. Check the
intergraty of the ROM, BIOS and
message Check Flash type and copy
flash write/erase routines to 0F000h
segments Check Cmos Circuitry and
reset CMOS Program the chipset
registers with CMOS values
Init onboard clock generator
Code(hex) Name
Description
66
Early System setup
Check the CPU ID and init L1/L2 cache
Initialize first 120 interrupt
vectors with SPURIOUS_INT_HDLR and
initialize INT 00h-1Fh according to
INT_TBL First step initialize if single CPU
onboard. Re-init KB
If support HPM, HPM get initialized
here
67
KBC and CMOS Init
Verifies CMOS is working correctly,
detects bad battery. If failed, load
CMOS defaults and load into chipset
Final Initial KBC and setup BIOS data
area.
68
Video Init
Read CMOS location 14h to find out
type of video in use.
Detect and Initialize Video Adapter.
Test video memory, write sign-on
message to screen.
Setup shadow RAM - Enable shadow
according to Setup.
69
8259 Init
Init 8259 channel 1 and mask IRQ 9
6A
Memory test
Quick Memory Test
6B
CPU Detect and IO
init
Detect CPU speed and display
CPU vendor specific version string
