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Development Tools User’s Guide
237
Intel
®
IXP2400/IXP2800 Network Processors
Transactor
state_spec
Any predefined simulation state or user defined state that holds a
numeric value. See Appendix A for more details on states.
bit_range
The bit_range spec has the same form as the index_range. If it is not
specified, the whole field is assumed.
Example:
In the following simulator code snippet, a user-defined variable called
"pass" is created and assigned a value of "1", and then examined using
the examine command.
>>> int pass;
>>> pass = 1;
1
>>> examine pass
pass<31:0> = 00000001 (1) (C interpreter variable)
>>>
8.3.11
exit
Format:
exit
Definition:
Closes all open log files and then exits the simulator. The Transactor main routine return status
returns the last recorded value of sim.error_count (the number of recorded errors that have
occurred).
8.3.12
force
Format:
force [expiration_cycles[:primary_clk]]
[state_name1[state_name2...]]
Definition:
Sets the data contents of specified state(s) to be unchangeable by any means. Non-model states
and states that behave as unconditional clock nodes cannot be forced.
expiration_cycles
If “expiration_cycles” is specified, the forced state will be automatically
removed after the specified number of cycles of the specified primary
clock is simulated; otherwise the force will be held indefinitely until it is
manually removed or re-forced.
Primary_clk
If no primary clock is specified, the default clock shown at the prompt is
used. Wildcards may be used to specify multiple states.
state_name
If no state is specified, the force command lists all state that are currently
forced. use “unforce” to remove the force from the state.
Example: