KIT_XMC4400_DC_V1
Drive Card XMC4400 V1
Hardware Description
Board User's Manual
11
Revision 1.0, 2013-11-05
2.2
Reset
A reset signal connected to the low-active PORST# pin of the target CPU (U201, see Figure 4) can be issued by
the on-board Reset Button (SW201, RESET) only. A reset debug command can be issued by the on-board
debug device (U401) or an external debugger connected to the Infineon Debug connector. Figure 5 shows the
reset button.
Figure 5
Reset Button
2.3
Clock Generation
An external 12 MHz crystal provides the clock signal to the XMC4400 microcontroller. The drive strength of the
oscillator is set to maximum by default, in order to ensure a safe start-up of the oscillator even under worst case
conditions. Therefore a serial 510 Ohm resistor will attenuate the oscillations during operations.
For the RTC clock a separate external 32.768 kHz crystal is used on board.
Figure 6
Clock Generation
2.4
Debug Interface
The KIT_XMC4400_DC_V1 is designed
to use “Serial Wire Debug” (SWD) as debug interface and JTAG debug
is not supported. It supports debugging via different channels which are all galvanically isolated from the power
GND supply domain:
On-board Debugger
Infineon Debug Connector (16-pin) with Debug and UART interface
CAN interface (X402)
Reset
Potentiometer_LED.emf
Potentiometer
User LEDs