Index DW9937S, Руководство по обслуживанию

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MITSUMI
I
2
C BUS Control 5-Input 2-Output AV Switch MM1313
Item Symbol Measure Conditions (unless otherwise indicated, Min. Typ. Max. Units
ment pin Measurement Circuit Figure 1)
R
OUT
2 output
Voltage gain
G
R
2 TP8 Sine wave 2.5V
P-P
, 1kHz -0.5 0.0 0.5 dB
Frequency characteristics
F
R
2 TP8 Sine wave 2.5V
P-P
, 1MHz/1kHz -3.0 0 1.0 dB
Total higher harmonic distortion
THD
R
2 TP8 Sine wave 2.5V
P-P
, 1kHz 0.03 0.1 %
Sine wave 1kHz
Input dynamic range
D
R
2 SG7 Maximum input for total higher 2.6 2.8 Vrms
harmonic distortion factor < 0.5%
Output offset voltage
V
OFFR
2 24
R
OUT
2 pin DC difference during
0 ±15 mV
switching
Output impedance
Z
OR
2 120
Ω
Crosswalk
V
OUT
1
C
TV
1 TP1
Measurement Circuit Figure 2
-60 -53 dB
V
OUT
2
C
TV
2 TP2
for SG1 input : 4.43MHz, 1V
P-P
-60 -53 dB
Y
OUT
1
C
TY
1 TP3
for SG2 input : 4.43MHz, 0.5V
P-P
-60 -53 dB
C
OUT
1
C
TC
1 TP6 -60 -53 dB
L
OUT
1
C
TL
1 TP4 -90 -80 dB
L
OUT
2
C
TL
2 TP5 Measurement Circuit Figure 2 -90 -80 dB
R
OUT
1
C
TR
1 TP7 1kHz, 2.5V
P-P
-90 -80 dB
R
OUT
2
C
TR
2 TP8 -90 -80 dB
Video I/O Pin Voltage
Input pin voltage
V
VIP
No signal, no load 4.6 4.9 5.2 V
V
VOP
V
OUT
1 pin, V
OUT
2 pin
4.1 4.4 4.7 V
Output pin voltage
No signal, no load
V
SOP
Y
OUT
1 pin, C
OUT
1 pin
3.3 3.6 3.9 V
No signal, no load
Audio I/O Pin Voltage
Input pin voltage
V
AIP
No signal, no load 4.0 4.3 4.6 V
Output pin voltage
V
AOP
No signal, no load 3.9 4.2 4.5 V
Logic section (Refer to figure below)
Input voltage L
V
IL
I
2
C logic low level discrimination value 0.0 1.5 V
Input voltage H
V
IH
I
2
Clogic high level discrimination value 3.0 5.0 V
Low level output voltage (SDA)
V
OL
SDA for 3mA inflow 0.0 0.4 V
High level input current
I
IH
when SDA, SCL=4.5V impressed -10 +10 µA
Low level input current
I
IL
when SDA, SCL=0.4V impressed -10 +10 µA
Clock frequency
f
SCL
100 kHz
Data transmission waiting time
t
BUF
4.7 µS
SCL start hold time
t
HD;STA
4.0 µS
SCL low level hold time
t
LOW
4.7 µS
SCL high level hold time
t
HIGH
4.0 µS
SCL start set-up time
t
SU;STA
4.7 µS
SDA data hold time
t
HD;DAT
200 nS
SDA data set-up time
t
SD;DAT
250 nS
SCL rise time
t
R
1000 nS
SCL fall time
t
F
300 nS
SCL stop set-up time
t
SU;STO
4.0 µS
SDA
SCL
t
BUF
P P S t HD:STA
t
HD:DAT
t
HIGH
t
SU:DAT
t
SU:STA
t
SU:STD
t
LOW
Sr
t
R
t
F
I
2
C BUS BUS Control Signal
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