A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
TERMINATION
AT E5.1
DDR TERMINATION VOLTAGE REGULATOR
TERMINATION
AT DDR
The VTT side of the terminaton resistors should be placed
on a wide VTT island on the surface layer. The island is
located at each end of the bus, so it does not interfere
with the signal routing.
VREF should be routed over a
reference plane and isolated, and possibly
shielded with both SSTL2_VDD and SSTL2_GND
VREF needs to be decoupled
to both SSTL2_VDD and SSTL2_GND with balanced
decoupling capacitors.
D0
TERM AT E5
LSI LOGIC
560 COTTONWOOD DR.
MILPITAS, CA 95035
U. S. A.
C
3
12
Monday, June 07, 2004
Title
Size
Document Number
Rev
Date:
Sheet
of
SDRAM_CS0
E5_SDRAM_DQ0
E5_SDRAM_DQ1
E5_SDRAM_DQ2
E5_SDRAM_DQ3
E5_SDRAM_DQ4
E5_SDRAM_DQ5
E5_SDRAM_DQ6
E5_SDRAM_DQ7
E5_SDRAM_DQ8
E5_SDRAM_DQ9
E5_SDRAM_DQ10
E5_SDRAM_DQ11
E5_SDRAM_DQ12
E5_SDRAM_DQ13
E5_SDRAM_DQ14
E5_SDRAM_DQ15
E5_SDRAM_DQ16
E5_SDRAM_DQ17
E5_SDRAM_DQ18
E5_SDRAM_DQ19
E5_SDRAM_DQ20
E5_SDRAM_DQ21
E5_SDRAM_DQ22
E5_SDRAM_DQ23
E5_SDRAM_DQ24
E5_SDRAM_DQ25
E5_SDRAM_DQ26
E5_SDRAM_DQ27
E5_SDRAM_DQ31
E5_SDRAM_DQ28
E5_SDRAM_DQ30
E5_SDRAM_DQ29
SDRAM_CLK1
SDRAM_CLK#1
SDRAM_CLK#0
SDRAM_CLK0
SDRAM_RAS#
SDRAM_WE#
SDRAM_CLKE
SDRAM_CAS#
SDRAM_A5
SDRAM_A3
SDRAM_A15
SDRAM_A4
SDRAM_A9
SDRAM_A14
SDRAM_A11
SDRAM_A0
SDRAM_A2
SDRAM_A12
SDRAM_A8
SDRAM_A6
SDRAM_A7
SDRAM_A1
SDRAM_DQM3
SDRAM_DQM2
SDRAM_DQS2
SDRAM_DQS3
SDRAM_DQS0
SDRAM_DQS1
SDRAM_A10
SDRAM_DQM0
SDRAM_DQM1
VREF
GND_SSTL2
GND_SSTL2
GND_SSTL2
VREF
GND_SSTL2
GND_SSTL2
VREF
SDRAM_DQ9
SDRAM_DQ3
SDRAM_DQ5
SDRAM_DQ12
SDRAM_DQ14
SDRAM_DQ21
SDRAM_DQ24
SDRAM_DQ6
SDRAM_DQ28
SDRAM_DQ31
SDRAM_DQ10
SDRAM_DQ13
SDRAM_DQ16
SDRAM_DQ18
SDRAM_DQ14
SDRAM_DQ2
SDRAM_DQ8
SDRAM_DQ4
SDRAM_DQ19
SDRAM_DQ26
SDRAM_DQ27
SDRAM_DQ2
SDRAM_DQ10
SDRAM_DQ11
SDRAM_DQ25
SDRAM_DQ4
SDRAM_DQ3
SDRAM_DQ17
SDRAM_DQ25
SDRAM_DQ24
SDRAM_DQ1
SDRAM_DQ17
SDRAM_DQ23
SDRAM_DQ15
SDRAM_DQ12
SDRAM_DQ20
SDRAM_DQ21
SDRAM_DQ5
SDRAM_DQ1
SDRAM_DQ0
SDRAM_DQ28
SDRAM_DQ22
SDRAM_DQ7
SDRAM_DQ15
SDRAM_DQ8
SDRAM_DQ29
SDRAM_DQ22
SDRAM_DQ7
SDRAM_DQ29
SDRAM_DQ13
SDRAM_DQ9
SDRAM_DQ11
SDRAM_DQ19
SDRAM_DQ26
SDRAM_DQ27
SDRAM_DQ6
SDRAM_DQ20
SDRAM_DQ30
SDRAM_DQ16
SDRAM_DQ18
SDRAM_DQ0
SDRAM_DQ30
SDRAM_DQ23
SDRAM_DQ31
VTT
VTT
SDRAM_DQ[31..0]
4
E5_SDRAM_DQ[31..0]
2
SDRAM_DQS1 4
SDRAM_DQS2 4
SDRAM_DQS0 4
SDRAM_DQS3 4
SDRAM_DQM2 4
SDRAM_DQM3 4
SDRAM_DQM1 4
SDRAM_DQM0 4
SDRAM_CLK#1 4
SDRAM_CLK1 4
SDRAM_CLK0 4
SDRAM_CLK#0 4
SDRAM_CS0 4
SDRAM_A0 4
SDRAM_A2 4
SDRAM_A1 4
SDRAM_A3 4
E5_SDRAM_CLK#1 2
E5_SDRAM_CLK1 2
E5_SDRAM_CLK0 2
E5_SDRAM_CLK#0 2
E5_SDRAM_CAS# 2
E5_SDRAM_CS0 2
SDRAM_DQ[31..0]
4
E5_SDRAM_DQM0 2
E5_SDRAM_DQM2 2
E5_SDRAM_DQM1 2
E5_SDRAM_DQM3 2
E5_SDRAM_DQS0 2
E5_SDRAM_DQS2 2
E5_SDRAM_DQS1 2
E5_SDRAM_DQS3 2
SDRAM_A4 4
VREF
2,4
VREF
2,4
VREF
2,4
E5_SDRAM_RAS# 2
E5_SDRAM_CLKE 2
E5_SDRAM_WE# 2
E5_SDRAM_A3 2
E5_SDRAM_A15 2
E5_SDRAM_A1 2
E5_SDRAM_A6 2
E5_SDRAM_A12 2
E5_SDRAM_A14 2
E5_SDRAM_A9 2
E5_SDRAM_A4 2
E5_SDRAM_A2 2
E5_SDRAM_A5 2
E5_SDRAM_A0 2
E5_SDRAM_A11 2
E5_SDRAM_A7 2
E5_SDRAM_A8 2
E5_SDRAM_A10 2
SDRAM_A7 4
SDRAM_A5 4
SDRAM_A6 4
SDRAM_A8 4
SDRAM_A11 4
SDRAM_A9 4
SDRAM_A10 4
SDRAM_A12 4
SDRAM_A14 4
SDRAM_A15 4
SDRAM_RAS# 4
SDRAM_CLKE 4
SDRAM_CAS# 4
SDRAM_WE# 4
VTT
SSTL2_VDD
SSTL2_VDD
VTT
SSTL2_VDD
SSTL2_VDD
VTT
VTT
SSTL2_VDD
C100
102
RP22 22/RP
1
8
2
7
3
6
4
5
RP10 51/RP
1
8
2
7
3
6
4
5
RP3
51/RP
1
8
2
7
3
6
4
5
C81
104
R59
51
RP20 22/RP
1
8
2
7
3
6
4
5
RP5
51/RP
1
8
2
7
3
6
4
5
C65
104
RP7
51/RP
1
8
2
7
3
6
4
5
RP19 51/RP
1
8
2
7
3
6
4
5
R65
22
RP9
51/RP
1
8
2
7
3
6
4
5
C80
104
RP11 51/RP
1
8
2
7
3
6
4
5
R46
51
RP16 22/RP
1
8
2
7
3
6
4
5
RP12 51/RP
1
8
2
7
3
6
4
5
R48
51
C95
102
+
CA4
220u/16
C82
102
RP14 51/RP
1
8
2
7
3
6
4
5
RP21 51/RP
1
8
2
7
3
6
4
5
C79
103
R58
51
C92
103
C61
104
C78
103
+
CA3
220u/16
C59
103
C91
103
R52
22
C63
103
C85
104
C60
103
C98
104
R53
22
U2
LP2995
1
2
3
4
5
6
7
8
NC
GND
VSENSE
VREF
VDDQ
AVIN
PVIN
VTT
R68
51
R55
22
R67
51
R57
22
RP26
22/RP
1
8
2
7
3
6
4
5
C93
104
C86
104
C77
104
C106
104
R56
51
R66
51
R60
51
C97
102
C66
103
C84
102
R61
51
R47
51
C67
103
C104
104
RP18 22/RP
1
8
2
7
3
6
4
5
C58
104
C70
104
C72
103
R63
51
C94
104
R49
51
C73
103
C71
104
C68
104
+
C102
10u/16
R62
51
R45
51
RP23
51/RP
1
8
2
7
3
6
4
5
C69
104
C90
104
C74
104
C101
102
+
C103
T47u/16
C76
104
R44
51
RP25 51/RP
1
8
2
7
3
6
4
5
C75
104
C88
102
RP6
51/RP
1
8
2
7
3
6
4
5
C62
104
C89
104
RP13 51/RP
1
8
2
7
3
6
4
5
RP17
51/RP
1
8
2
7
3
6
4
5
RP1
51/RP
1
8
2
7
3
6
4
5
C96
102
RP2 51/RP
1
8
2
7
3
6
4
5
C83
102
RP4
51/RP
1
8
2
7
3
6
4
5
C64
104
R54
51
C107
104
RP8
51/RP
1
8
2
7
3
6
4
5
C105
104
RP15
51/RP
1
8
2
7
3
6
4
5
C99
104
R50
51
RP24 22/RP
1
8
2
7
3
6
4
5
R64
51
R51
51
C57
104
C87
102
75
Содержание DW9937S
Страница 1: ...SERVICE MANUAL DW9937S Ver 0 0 ...
Страница 3: ...1 ...
Страница 4: ...2 ...
Страница 5: ...3 ...
Страница 7: ...EXPLODED VIEW 5 5 ...
Страница 15: ...14 13 ...
Страница 16: ...15 14 ...
Страница 17: ...16 15 ...
Страница 18: ...17 IS2 16 ...
Страница 22: ...MITSUMI I2 C BUS Control 5 Input 2 Output AV Switch MM1313 Equivalent Block Diagram 20 ...
Страница 27: ...MITSUMI I2 C BUS Control 5 Input 2 Output AV Switch MM1313 Measurement Circuit Measurement Circuit 1 25 ...
Страница 28: ...MITSUMI I2 C BUS Control 5 Input 2 Output AV Switch MM1313 Measurement Circuit 2 Crosstalk measurement 26 ...
Страница 70: ...FSDM07652RB Package Dimensions TO 220F 6L Forming 68 ...
Страница 74: ...72 ...
Страница 75: ...11 Terminal for External Connection Outline Drawing 73 ...
Страница 99: ...97 ...
Страница 100: ...98 ...
Страница 101: ...99 ...
Страница 102: ...100 ...