PRELIMINARY
SF104-P01
SF3013M Fingerprint Image Sensor Module User Manual
Page - 8
In the above diagram, OPCLK is used for internal timing, and PCLK is for image pixels.
The “detect start” signal starts the short “finger detect” cycle in detect mode.
The PCLK is 1/6 of OPCLK. OPCLK is the system clock pre-scaled by 1~16, controlled
by REG0/REG_CLK bit[3:0]. The detect start clock is controlled by REG9/REG_DDIV
bit[7:0].
For example, given the system clock input of 18Mhz, and REG0/REG_CLK bit[3:0]
value is 2 (divide by 3), then OPCLK is 6Mhz and PCLK is 1Mhz.
3.2 Configuring gain and range of pre-amp and ADC
Divide by
div_opclk
Clock from
external
oscillator
Divide
by 6
Divide by
4096
PCLK
OPCLK
Divide by
(DDIV+1)
detect
start
