R E M O T E O P E R A T I O N
Status Reporting
28
MPS-8033
C H A P T E R
3
!
Event Status Register Contents
Event Status is a 16−bit register/enable−register pair with this structure:
Bit Reference:
The Event Status Enable Register allows you to control which events in the Event Status Register
can set bit 2 in the status byte register. Note that this register pair is identical to the Condition Status
register pair (below), except for bit 11.
Event status indicates the FIRST occurrence, and does not change except when reset. The 8033
starts at power ON with the event status register set to all zeros. Querying the Event Status Register
resets its contents to zeros.
Related commands: (See Chapter 4, Command Reference for details).
•
*EVEnt?
˙Query the contents of the Event Status Register.
•
*ENABle:EVEnt <nrf>
˙Set an enable mask in the Event Status Enable Register.
•
*ENABle:EVEnt?
˙Query the Event Status Enable Register mask settings.
0− Output Change
4− N/A
8− N/A
12− Calculation Error
1− Interlock Disabled
5− N/A
9− N/A
13− Hardware Error
2− Measurment Update
6− N/A
10− N/A
14− Software Error
3− N/A
7− N/A
11− N/A
15− Checksum Error
&
&
&
&
&
&
&
&
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
&
&
&
&
&
&
&
&
15 14131211 10
8
9
10
11
12
13
14
15
9 8
Copy of Status Byte
Parallel Poll Enable Register
Logical
OR
IST TRUE
Evemt Status Register
Event Status Enable Register
To Bit 0, Status Byte Register
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Содержание MPS-8033 Series
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