IEI Technology PCISA-MARK, Руководство пользователя

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PCISA-MARK CPU Card
SDRAM Cycle Length [3]
Use the SDRAM Cycle Length option to specify the time delay in clock cycles the system
must wait before the SDRAM starts to carry out a read command after the read command
is received.
2
3 (Default)
Bank Interleave [Disabled]
Use the Bank Interleave option to specify how multiple modules communicate with each
other. Interleaving enables access to a second memory bank when the first memory bank
is being accessed. The following configuration options are available:
Disabled
2 Bank
4 Bank (D
EFAULT
)
Memory Hole [Disabled]
Use the Memory Hole option to reserve memory space between 15MB and 16MB for ISA
expansion cards that require a specified area of memory to work properly. If an older ISA
expansion card is used, please refer to the documentation that came with the card to see if
it is necessary to reserve the space.
Disabled (D
EFAULT
) Memory is not reserved for ISA expansion cards
15M–16M Memory is reserved for ISA expansion cards
P2C/C2P Concurrency [Enabled]
Use the P2C/C2P Concurrency option to enable bi-directional data transmission between
the PCI bus and the CPU.
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