PCISA-MARK CPU Card
When disabled, the writes are not buffered and the CPU must wait until the write is
complete before starting another write cycle.
Disabled
No buffering when writes from the CPU to the PCI bus
occurs
Enabled
(D
EFAULT
)
Buffering when writes from the CPU to the PCI bus
occurs
PCI Dynamic Bursting [Enabled]
Use the
PCI Dynamic Bursting
option to enable every write transaction to go to the write
buffer and then allow burstable transactions then burst on the PCI bus and nonburstable
transactions do not.
Disabled
PCI dynamic bursting does not occur
Enabled
(D
EFAULT
)
PCI dynamic bursting does occur
PCI Master 0 WS Write [Enabled]
Use the
PCI Master 0 WS Write
option to enable zero wait states when writes to the PCI
occur.
Disabled
There are no zero wait states when there are writes to
the PCI bus
Enabled
(D
EFAULT
)
There are zero wait states when there are writes to the
PCI bus
PCI Delay Transaction [Disabled]
Use the
PCI Delay Transaction
option to support compliance with PCI specification
version 2.1. The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles.
Page 134
IEI® Technology, Corp
.
Содержание PCISA-MARK
Страница 1: ...0 1 PCISA MARK CPU Card 1...
Страница 14: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 14 IEI Technology Corp...
Страница 15: ...PCISA MARK CPU Card 1 Introduction Chapter 1 Page 15...
Страница 18: ...PCISA MARK CPU Card 1 2 PCISA MARK Overview Figure 1 1 PCISA MARK Overview Page 18 IEI Technology Corp...
Страница 19: ...PCISA MARK CPU Card Figure 1 2 PCISA MARK Overview Solder Side Page 19...
Страница 23: ...PCISA MARK CPU Card Chapter 2 2 Detailed Specifications Page 23...
Страница 36: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 36 IEI Technology Corp...
Страница 37: ...PCISA MARK CPU Card Chapter 3 3 Connectors and Jumpers Page 37...
Страница 46: ...PCISA MARK CPU Card Figure 3 5 Compact Flash Connector Location Page 46 IEI Technology Corp...
Страница 52: ...PCISA MARK CPU Card Figure 3 8 DIMM Socket Location Page 52 IEI Technology Corp...
Страница 88: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 88 IEI Technology Corp...
Страница 89: ...PCISA MARK CPU Card Chapter 4 4 Installation Page 89...
Страница 106: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 106 IEI Technology Corp...
Страница 107: ...PCISA MARK CPU Card Chapter 5 5 BIOS Settings Page 107...
Страница 165: ...PCISA MARK CPU Card Chapter 6 6 Driver Installation Page 165...
Страница 169: ...PCISA MARK CPU Card Step 5 The Readme in Figure 6 4 appears Click YES to continue Figure 6 4 Readme Information Page 169...
Страница 178: ...PCISA MARK CPU Card Figure 6 15 Audio Driver Software Configuration Page 178 IEI Technology Corp...
Страница 185: ...PCISA MARK CPU Card Appendix A A BIOS Menu Options Page 185...
Страница 191: ...PCISA MARK CPU Card B Watchdog Timer Appendix B Page 191...
Страница 194: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 194 IEI Technology Corp...
Страница 195: ...PCISA MARK CPU Card C Address Mapping Appendix C Page 195...
Страница 198: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 198 IEI Technology Corp...
Страница 199: ...PCISA MARK CPU Card D External AC 97 Audio CODEC Appendix D Page 199...
Страница 206: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 206 IEI Technology Corp...
Страница 207: ...PCISA MARK CPU Card E RAID Setup Appendix E Page 207...
Страница 220: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 220 IEI Technology Corp...
Страница 221: ...PCISA MARK CPU Card 7 Index Page 221...
Страница 224: ...PCISA MARK CPU Card THIS PAGE IS INTENTIONALLY LEFT BLANK Page 224 IEI Technology Corp...