![IDT EB-LOGAN-23 Скачать руководство пользователя страница 10](http://html1.mh-extra.com/html/idt/eb-logan-23/eb-logan-23_manual_3810139010.webp)
IDT Description of the EB-LOGAN-23 Evaluation Board
89EB-LOGAN-23 Evaluation Board
1 - 2
February 16, 2011
Notes
Board Features
Hardware
32NT24AG2 PCIe 24-port switch
–
Twenty four ports (8 x2 and 16 x1) — adjacent ports may be combined to create x4 or x8 ports
–
PCIe Base Specification Revision 2.1 compliant (Gen2 SerDes speeds of 5 GT/S)
–
Up to 2048 byte maximum Payload Size
–
Automatic lane reversal and polarity inversion supported on all lanes
–
Automatic per port link width negotiation to x8, x4, x2, x1
–
Power on reconfiguration via optional serial EEPROM connected to the SMBUS Master interface
Upstream, Downstream Ports
–
The EB-LOGAN-23 has a minimum of one port configured as an upstream port to be plugged into
a host slot through an adaptor and a cable.
–
Up to 23 ports can be configured as downstream ports, for PCIe endpoint add-on cards to be
plugged in. The slot connectors can be configured to be x1, x2, x4, or x8, but are mechanically
open-ended on one side to allow card widths greater than x8 (e.g. x16) to be populated.
–
When used in multi-partition mode, the device can be programmed through the serial EEPROM
to generate the appropriate number of upstream and downstream ports per partition.
Numerous user selectable configurations set using onboard jumpers and DIP-switches
–
Source of clock - host clock or onboard clock generator
–
Two clock rates (100/125 MHz) from an onboard clock generator
–
Flexible clocking modes
• Common clock
• Non-common clock
• Local port clocking on ports that support this feature
–
Boot mode selection
SMBUS Slave Interface (4 pin header)
SMBUS Master Interface connected to the Serial EEPROMs through I/O expander
Push button for Warm Reset
Many LEDs to display status, reset, power, hot-plug, etc.
JTAG connector to the 32NT24AG2 JTAG pins.
Software
There is no software or firmware executed on the board. However, useful software is provided along
with the Evaluation Board to facilitate configuration and evaluation of the 32NT24AG2 within host systems
running popular operating systems.
Installation programs
–
Operating Systems Supported: WindowsServer200x, WindowsXP, Vista, Linux
GUI based application for Windows and Linux
–
Allows users to view and modify registers in the 32NT24AG2
–
Binary file generator for programming the serial EEPROMs attached to the SMBUS.
Other
SMBUS cable may be required for certain evaluation exercises.
SMA connectors are provided on the EB-LOGAN-23 board for clock outputs.
Revision History
March 15, 2010:
Initial publication of evaluation board manual.
April 23, 2010:
Updated Schematics in Chapter 4.
Содержание EB-LOGAN-23
Страница 4: ...IDT Table of Contents EB LOGAN 23 Evaluation Board ii February 16 2011 Notes ...
Страница 6: ...IDT List of Figures EB LOGAN 23 Evaluation Board iv February 16 2011 Notes ...
Страница 8: ...IDT List of Tables VB64H16AG2 Validation Board Manual vi February 16 2011 Notes ...
Страница 12: ...IDT Description of the EB LOGAN 23 Evaluation Board 89EB LOGAN 23 Evaluation Board 1 4 February 16 2011 Notes ...
Страница 40: ...IDT Software For EB LOGAN 23 89EB LOGAN 23 Evaluation Board 3 2 February 16 2011 Notes ...
Страница 41: ...Notes EB LOGAN 23 Evaluation Board 4 1 February 16 2011 Chapter 4 Schematics Schematics ...