Appendix B. System Address Maps
Table 52 (Page 2 of 2). DMA I/O Addresses
Address (Hex)
Description
Bits
Byte Pointer
00D6
Channels 4–7, Mode register (write)
00–07
00D8
Channels 4–7, Clear byte pointer (write)
NA
00DA
Channels 4–7, Master clear (write)/temp (read)
00–07
00DC
Channels 4–7, Clear Mask register (write)
00–03
00DE
Channels 4–7, Write All Mask register bits
00–03
00DF
Channels 5–7, 8- or 16-bit mode select
00–07
Appendix B. System Address Maps
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