Chapter 2. System Board Features
System Memory
The system memory interface in IntelliStation M Pro computers is controlled by the Intel 82440LX chip set
module. (Refer to “Chip Set Control” for information on his module.) There are four dual inline memory
module (DIMM) sockets on the system board. The DIMM sockets are powered by
+
3.3 volts. This
voltage allows for low-power operation and supports 64-Mbit technology. For DIMM socket pin
assignments, refer to “System Memory Connectors” on page 46.
The system board supports:
A total of 512 MB of system memory
A maximum of 128 MB of system memory in each DIMM socket
Any configuration of DIMMs is acceptable. However, DIMMs must have the following characteristics:
Must be 64-bit wide or 72-bit wide error correcting code (ECC) synchronous DRAMs (SDRAMs)
Must be 32, 64, or 128 MB in size
Must be 168-pin, unbuffered,
+
3 V, serial PD type
Must have gold-lead tabs
Also, note the following:
64-bit wide and 72-bit wide modules and ECC modules can be mixed, but they will configure as 64-bit
wide
To enable ECC, all installed memory must be of the ECC type
IBM EDO-mode DIMMs are supported in full EDO configurations only
Note: Single inline memory modules (SIMMs) are not supported in IntelliStation M Pro computers
PCI-to-ISA Bridge
The PIIX4 chipset module provides the bridge between the peripheral component interconnect (PCI) and
industry standard architecture (ISA) buses. The chip is used to convert PCI bus cycles to ISA bus cycles.
The PCI bus is compliant with
PCI Local Bus Specification 2.1. The PCI bus runs synchronously to the
host bus and is driven at a frequency of 33 MHz (half the speed of the 66 MHz microprocessor bus). The
ISA bus is permanently set to the PCI bus speed divided by four (8.33 MHz).
For information on PCI and ISA bus expansion connectors, see Appendix A, “Connector Pin Assignments”
on page 36.
System I/O and Power Management
The Intel PIIX4 chipset module that provides the PCI-to-ISA bridge also provides all the subsystems of the
ISA bus. These subsystems are:
An ISA-compatible interrupt controller that provides the function of two cascaded 82C59 interrupt
controllers
Three counters, equivalent to an 82C54 programmable interval timer
The function of two 82C37 DMA controllers with seven independent DMA channels (four 8-bit
channels and three 16-bit channels)
Power management features
For further information on the PIIX4 chipset module, refer to “Chip Set Control” on page 7.
8
Technical Information Manual
