HP ZX2000, Техническое справочное руководство, Страница: 115 / 136

technical reference guide B–3
System Board
system board components
The following sections describes the main components of the zx2000 system board.
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Intel® Itanium® 2 Processor
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ZX1 I/O and Memory Controller
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I/O Bus Interface
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Processor Dependent Hardware Controller
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Dual Serial Controller
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Field Programmable Gate Array Controller
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Baseboard Management Controller (BMC)
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IDE Interface
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10/100/1000 BT LAN
Intel® Itanium® 2 processor
The Intel® Itanium® 2 processor provides the following features:
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Eight-stage pipeline, six general-purpose ALUs, two integer units, one shift unit, four
floating-point units
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Split L1 cache:
❏
16 KB, 4-way set associative data cache
❏
16 KB, 4-way set associative instruction cache
❏
64 byte line size
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Unified L2 cache:
❏
256 KB, 8-way set associative
❏
128 byte line size
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Unified L3 cache:
❏
1.5 MB, 6-way set associative (900 MHz)
❏
128 byte line size
processor bus
The Intel® Itanium® processor bus (Front Side Bus, FSB) runs at 200 MHz. Data on the FSB
runs at a double data rate, which allows a peak FSB bandwidth of 6.4 GB/sec.