HP VXI 75000 C Series, Руководство пользователя и программирования SCPI

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98 Programming the HP E1415 for PID Control Chapter 3
Enabling Events to
be Reported in the
Status Byte
There are two sets of registers that individual status conditions must pass
through before that condition can be recorded in a group’s Event Register.
These are the Transition Filter Registers and the Enable registers. They
provide selectivity in recording and reporting module status conditions.
Configuring the
Transition Filters
Figure 3-12 shows that the Condition Register outputs are routed to the
input of the Negative Transition and Positive Transition Filter Registers. For
space reasons they are shown together but are controlled by individual SCPI
commands. Here is the truth table for the Transition Filter Registers:
The Power-on default condition is: All Positive Transition Filter Register
bits set to one and all Negative Transition Filter Register bits set to 0. This
applies to both the Operation and Questionable Data Groups.
An Example using the Operation Group
Suppose that you wanted the module to report via the Status System when it
had completed executing *CAL?. The "Calibrating" bit (bit 0) in the
Operation Condition Register goes to 1 when *CAL? is executing and
returns to 0 when *CAL? is complete. In order to record only the negative
transition of this bit in the STAT:OPER:EVEN register you would send:
STAT:OPER:PTR 32766
All ones in Pos Trans Filter
register except bit 0=0
STAT:OPER:NTR 1
All zeros in Neg Trans Filter
register except bit 0=1
Now when *CAL? completes and Operation Condition Register bit zero
goes from 1 to 0, Operation Event Register bit zero will become a 1.
Configuring the
Enable Registers
Figure 3-12 you will note that each Status Group has an Enable Register.
These control whether or not the occurrence of an individual status condition
will be reported by the group’s summary bit in the Status Byte.
Questionable Data Group Examples
If you only wanted the "FIFO Overflowed" condition to be reported by the
QUE bit (bit 3) of the Status Byte, you would execute;
STAT:QUES:ENAB 1024
1024=decimal value for bit 10
Condition Reg Bit PTRansition Reg Bit NTRansition Reg Bit Event Reg Input
0
→
1
0 0 0
1
→
0
0 0 0
0
→
1
1 0 1
1
→
0
1 0 0
0
→
1
0 1 0
1
→
0
0 1 1
0
→
1
1 1 1
1
→
0
1 1 1