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Triggering Hints

Storage Qualification

Any use of storage qualification in the trigger sequence will result in error
messages in the inverse assembly column in the Listing. The preprocessor
interface communicates its switch settings and dynamic AERR/BINIT
observation policies to the logic analyzer via a repeating serial frame on a
preprocessor-generated signal. Storage qualification interrupts this serial
frame, resulting in transaction tracker/disassembler errors.

Triggering on address and transaction type

To trigger on a specific address and transaction type, use the A35-32,
A31-00, and TranTy labels, together with the TranTy label symbols. The
symbols identify each transaction type uniquely, except for Interrupt
Acknowledge and Special Transactions, which are combined into one symbol.

Triggering on data and transaction type

There is no guaranteed method of triggering on a particular transaction type
or address ANDed with a particular data value in a target system with
overlapping transactions. Although the Listing displays a transaction type
and 8-byte data value on the same line when Transaction Display Mode is set
to Short, this alignment is the result of post-processing and cannot be used
for triggering. The preprocessor interface hardware captures this
information on different states. A trigger specification could be defined to
find a certain transaction type in the Request A phase, then trigger on a data
value qualified by DRDY# asserted; however, by the time the data pattern is
found, it could belong to a different transaction.

Preprocessor Interface for the Pentium II Processor

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Содержание E2466C

Страница 1: ...ble You will find any other available product information on the Agilent Test Measurement website www tm agilent com HP References in this Manual This manual may contain references to HP or Hewlett Packard Please note that Hewlett Packard s former test and measurement semiconductor products and chemical analysis businesses are now part of Agilent Technologies We have made no changes to this manual...

Страница 2: ... First Edition July 1997 For Safety information Warranties and Regulatory information see the pages behind Appendix A Copyright Hewlett Packard Company 1997 All Rights Reserved HP E2466C Preprocessor Interface for the Intel Pentium II Processor ...

Страница 3: ...instruction disassembly Branch Trace Messages must be enabled and caches must be disabled This requires a Pentium II processor run control tool such as the HP E3493A and a 30 pin debug port on the target system Logic Analyzer 16500B Software Version 16500C Software Version Channel Count State Speed Timing Speed Memory Depth 16550A two card v3 09 v1 03 204 100 MHz 250 MHz 4 k states 16554A three ca...

Страница 4: ...he signals For more information on the supported logic analyzers the HP 16505A or the microprocessor refer to the appropriate reference manuals for those products HP E2466C Preprocessor Interface Pentium II processor is a registered trademark of Intel Corporation MMX technology is a trademark of Intel Corporation Figure 1 Introduction The HP E2466C Preprocessor Interface At a Glance Preprocessor I...

Страница 5: ...rmat specification and symbols configured by the preprocessor interface software and information about the transaction tracker files It also contains information about the inverse assembler Chapter 3 contains reference information on the preprocessor interface hardware including the characteristics and signal mapping for the preprocessor interface Appendix A contains information on troubleshooting...

Страница 6: ... 16 To copy the HP 16500B C logic analyzer files 1 17 To load the HP 16505A Prototype Analyzer files 1 18 To set up the preprocessor interface for timing 1 19 To connect to the APIC and JTAG signals 1 20 2 Analyzing the Intel Pentium II Processor Displaying Information 2 3 To set up the HP 16505A workspace 2 3 To display the format specification 2 3 To display the configuration symbols 2 4 To disp...

Страница 7: ... transaction type 2 21 Triggering on data and transaction type 2 21 3 Preprocessor Interface Hardware Reference Operating Characteristics 3 3 Signal line loading 3 5 Modes of operation 3 6 State Mode Operation 3 6 State Mode Clocking 3 6 Timing Mode Operation 3 7 HP E2466C Block Diagram 3 8 Signal to Connector Mapping 3 9 Circuit Board Dimensions 3 21 Repair Strategy 3 23 A If You Have a Problem A...

Страница 8: ...mode or clk qual off A 9 pp error sync lost reset target A 9 pp error rcnt invalid reset target A 9 pp error scnt invalid reset target A 9 ia error BTM with target code read missing A 9 ia warning too few states modes assumed A 10 ia warning next BTM missing no disassembly A 10 ia warning disassembly requires Branch Trace A 10 data ECC error A 10 Intermodule Measurement Problems A 11 An event wasn...

Страница 9: ... Boundary Error Message 2 12 Figure 15 Listing Menu Showing End of Boundary 2 13 Figure 16 HP 16505A Pentium II Filter Dialog 2 15 Figure 17 HP 16505A Pentium II Preferences Dialog 2 17 Figure 18 HP 16505A Listing window for Software Analysis 2 18 Figure 19 Reset Configuration 2 20 Figure 20 Signal Line Loading 3 5 Figure 21 HP E2466C Block Diagram 3 8 Figure 22 HP E2466C Dimensions 3 21 Tables Ta...

Страница 10: ...1 Setting Up the Preprocessor Interface ...

Страница 11: ...tware configure the preprocessor and connect the preprocessor to supported logic analyzers It also contains information on setting up the HP 16505A Prototype Analyzer for use with the HP E2466C Preprocessor Interface and using the HP E2467A APIC Bus Preprocessor Interface 1 2 Preprocessor Interface for the Pentium II Processor ...

Страница 12: ... Interface configuration files and transaction tracker software An HP 16505A Prototype Analyzer A target system with the microprocessor circuit board removed from the S E C cartridge Detailed instructions for disassembling the S E C cartridge can be found in Intel s S E C Cartridge Disassembly Application Note One of the logic analyzers listed in the table on page ii in an HP 16500B C Logic Analys...

Страница 13: ...h the HP E2466C Additional configuration software for increased analysis of Pentium II processor target systems is available with the appropriate Intel non disclosure forms Contact your HP Sales Office for further information about the restricted version Before You Begin 1 4 Preprocessor Interface for the Pentium II Processor ...

Страница 14: ...ng the microprocessor 4 Install the preprocessor interface in the target system 5 Connect the logic analyzer pods to the cable connectors of the preprocessor interface board To select the operating mode Two switches on the preprocessor select the operating mode The LEDs indicate the selected mode see table 1 The HP 16505A Prototype Analyzer must also be updated to match the Mode state or timing se...

Страница 15: ... Switch QUAL Switch Operating Mode Clock Qualifier Red only Up Timing Red and Green Down Up State with Expanded Clock Qualifier Green only Down Down State with Compacted Clock Qualifier Switches for State Timing Mode and Clock Qualifier Figure 2 Setting Up the Preprocessor Interface Hardware To select the operating mode 1 6 Preprocessor Interface for the Pentium II Processor ...

Страница 16: ...e voids the Intel warranty Also there is a high probability that the cover and thermal plate will be damaged during disassembly and a small possibility that the microprocessor card will be damaged The S E C cartridge is not intended to be reassembled after disassembly 1 Remove the S E C cartridge from the target system by pushing in the two tabs on top of the cartridge then pulling the cartridge u...

Страница 17: ...t at the same end of the cartridge then repeat for the other end of the cartridge Disassembling the S E C Cartridge 3 Using the instructions in the Intel S E C Cartridge Disassembly Application Note use fine tip round nose pliers to separate the tabs on the thermal plate away from the locator pins Remove the spring retainer clips then separate the thermal plate from the microprocessor circuit boar...

Страница 18: ...e preprocessor interposer and on the microprocessor before making any connection Take care to align the preprocessor connector assembly with the pins on the microprocessor so that all pins make contact 2 Install the interposer onto the microprocessor on the target system The alignment tabs on the interposer aid in making proper alignment Ensure that pin A1 is oriented correctly see figure below Pr...

Страница 19: ...ce onto the interposer using the three alignment pins as shown in the figure below Aligning the Probe End Figure 6 Setting Up the Preprocessor Interface Hardware To connect to the target system 1 10 Preprocessor Interface for the Pentium II Processor ...

Страница 20: ...he preprocessor will not make good contact with the microprocessor pins If the screw is too tight it may damage the interface connector 8 Insert the heat sink into the rectangular opening on top of the preprocessor interface Select an orientation that does not interfere with the target system Tighten the two screws until the heat sink is snug Do not overtighten 9 Connect the heat sink to a 12 Volt...

Страница 21: ...processor Connector Numbers and Pin A1 Location C AU TI O N Support the HP E2466C PC board when connecting or disconnecting logic analyzer cables This will help to prevent damage to the PC board and its components Figure 8 Setting Up the Preprocessor Interface Hardware To connect to the target system 1 12 Preprocessor Interface for the Pentium II Processor ...

Страница 22: ...figuration file CP6C_2P for the two card HP 16550A Logic Analyzer When using the HP E2467A APIC Bus Preprocessor Interface Master Pod 1 and Master Pod 2 are connected for APIC analysis In this case use configuration file CP6C_2AP Setting Up the Preprocessor Interface Hardware To connect to the HP 16550A two card analyzer Preprocessor Interface for the Pentium II Processor 1 13 ...

Страница 23: ...figuration file CP6C_1P for the HP 16554A 55A 56A Logic Analyzers When using the HP E2467A APIC Bus Preprocessor Interface Master Pod 1 and Master Pod 2 are connected for APIC analysis In this case use configuration file CP6C_1AP Setting Up the Preprocessor Interface Hardware To connect to the HP 16554 55 56 analyzers 1 14 Preprocessor Interface for the Pentium II Processor ...

Страница 24: ...e probe end of the preprocessor interface with a conductive padded wrapper The probe end of the preprocessor interface was covered at the time of shipment with a conductive padded wrapper If this wrapper is not damaged it may be reused repeatedly 2 Store the preprocessor interface in an antistatic bag or container Electrostatic Discharge Covering the probe end and properly storing the preprocessor...

Страница 25: ...ts of one HP 16500B C Logic Analysis System disk and one HP 16505A Prototype Analyzer disk The HP 16500B C disk contains logic analyzer configuration files the HP 16505A disk contains the transaction tracker and the inverse assembler 1 16 Preprocessor Interface for the Pentium II Processor ...

Страница 26: ...yzer Configs flexible disk in the disk drive of the HP 16500B C 4 Select the System Hard Disk menu 5 Create a directory on the logic analyzer using the command sequence Make Directory new directory name name Execute 6 Select the System Flexible Disk menu Copy all files to the directory on the hard disk using the command sequence Copy file to name on Hard Disk Execute The logic analyzer is configur...

Страница 27: ...the Update button The window should display Filegroup pp_pentium2 Version A 01 30 Click on Update Install and respond to the question by clicking on OK Wait for the Information dialog to confirm a successful installation Click on OK to acknowledge and Close the Update Install window 5 Load the logic analyzer configuration file Start a session from the Session Manager window When the main HP 16505A...

Страница 28: ...tion Only the Red LED should be lit 2 Select the Pentium II icon on the HP 16505A and open the Config menu of the logic analyzer 3 Select the Type field for the analyzer and select Timing The following figure shows the HP 16505A Config Menu display for the HP 16550A logic analyzer Configuration Menu with Timing Mode Figure 9 Setting Up the Preprocessor Interface Software To set up the preprocessor...

Страница 29: ...als with the exception of lreset are buffered versions of the Pentium II processor bus signals they are not latched by the bus clock The special signal lreset is an inverted version of the P6 RESET signal and is latched by the bus clock Do not attempt to use the JTAG header as a run control interface This header is only capable of monitoring JTAG activity The APIC signals can be connected to the H...

Страница 30: ...in Signal Pin Signal Pin Signal Pin Signal 10 n c 9 n c 10 GND 9 TRST 8 n c 7 lreset 8 GND 7 TDO 6 GND 5 PICD1 6 GND 5 TDI 4 GND 3 PICD0 4 GND 3 TMS 2 GND 1 PICCLK 2 GND 1 TCK Figure 10 To connect to the APIC and JTAG signals To set up the preprocessor interface for timing Preprocessor Interface for the Pentium II Processor 1 21 ...

Страница 31: ...1 22 Preprocessor Interface for the Pentium II Processor ...

Страница 32: ...2 Analyzing the Pentium II Processor ...

Страница 33: ... configuration information and preprocessor interface data gives label and symbol encodings for the status field and provides information about the transaction tracker and the inverse assembler as displayed on the HP 16505A 2 2 Preprocessor Interface for the Pentium II Processor ...

Страница 34: ...I Inverse Assembly appears To display the format specification Using the mouse right click and hold on the instrument icon for the logic analyzer In the pop up menu slide down to Format then release the mouse button The HP E2466C configuration files contain predefined format specifications These format specifications include all labels for monitoring the microprocessor bus Chapter 3 of this guide ...

Страница 35: ...ls associated with the label The HP E2466C configuration software sets up symbol tables The tables contain alphanumeric symbols which identify data patterns or ranges Labels simplify triggering on specific Pentium II processor cycles The label base in the symbols menu is set to hexadecimal to conserve display space All Pentium II processor signals are routed to the logic analyzer probe headers or ...

Страница 36: ... Address Parity signals BCLK positive 1 Bus Clock signal BERR positive 1 Bus Error signal BINIT positive 1 Bus Initialization signal BNR positive 1 Block Next Request signal BP3 positive 1 Breakpoint signal BP2 positive 1 Breakpoint signal BPM1 positive 1 Breakpoint and Performance Monitor signal BPM0 positive 1 Breakpoint and Performance Monitor signal BPRI positive 1 Priority Agent Bus Request s...

Страница 37: ...itive 2 Local Interrupt signals LOCK positive 1 Bus Lock signal NMI positive 1 Non maskable Interrupt signal PRDY positive 1 Probe Ready signal PREQ positive 1 Probe Request signal RESET positive 1 Reset signal RP positive 1 Request Parity signal RS positive 3 Response Status RSP positive 1 Response Parity signal SMI positive 1 System Management Interrupt signal STPCK positive 1 Stop Clock signal ...

Страница 38: ... label Table 4 Pentium II Processor Transaction Type Symbols Signal Symbol TranTy Branch Trace Code Read Data Read Defer Reply Int Ack Spcl Invalidate I O Read I O Write Mem Write RSVD_1 RSVD_2 RSVD_3 RSVD_4 Writeback Displaying Information To display the configuration symbols Preprocessor Interface for the Pentium II Processor 2 7 ...

Страница 39: ... address twice for example make sure the preprocessor interface hardware is configured for state analysis See Chapter 1 to review the hardware configuration correct it if needed and then run the trace again Figure 12 shows the Listing display for the HP 16550A logic analyzer Logic Analyzer Listing Display Figure 12 Displaying Information To display captured state information 2 8 Preprocessor Inter...

Страница 40: ... for your logic analyzer The following figure shows the Waveform display for the HP 16550A logic analyzer Logic Analyzer Waveform Display Figure 13 Displaying Information To display captured timing data Preprocessor Interface for the Pentium II Processor 2 9 ...

Страница 41: ... in a transaction based format Numeric Format For the data phase display the numeric output from the transaction tracker is in hexadecimal format All other numbers are in decimal format Filter options The transaction tracker supports many filter options based on types of states start of a transaction part of some transaction transaction types and transaction ownership The following is a list of th...

Страница 42: ...ect the data which is stored by the logic analyzer they only affect whether that data is displayed or not The same data can be examined with different settings for different analysis requirements This function gives you a better analysis display in two ways First unneeded information can be filtered out of the display Second particular operations can be isolated by suppressing all other operations...

Страница 43: ...scription of the messages refer to Appendix A Reaching boundaries If the transaction tracker internal search limit 8192 states per transaction is exceeded or if part of a transaction is not acquired at the end of the analyzer acquisition memory error messages may be displayed Figure 14 shows a warning message Figure 15 shows the end of a boundary Listing Display with Boundary Error Message Figure ...

Страница 44: ... Protocol violations are followed with line protocol violation detected The transaction tracker does not attempt to do a complete job of detecting protocol violations Undetected protocol violations may cause the transaction tracker to display incorrect results Figure 15 Using the Transaction Tracker Transaction tracker messages Preprocessor Interface for the Pentium II Processor 2 13 ...

Страница 45: ...acquisition state whereas the Preferences dialog controls the display format for a state which is shown Disassembly is only possible when Display Disassembly is selected in the Preferences dialog and Branch Trace Messages are selected in the Filter dialog Additionally a run control tool should be used to enable Branch Trace Messages and disable the instruction caches for all processors Hardware sw...

Страница 46: ...tion can be used to identify either transactions or processors Show Phases allows you to show only the Request A Phase which contains a summary of the entire transaction or All Phases which includes all captured states pertaining to each transaction The figure below shows a sample Filter dialog HP 16505A Pentium II Filter Dialog Figure 16 Using the Inverse Assembler Pentium II filter dialog Prepro...

Страница 47: ...s The transaction Format can be set to Short to display one line per transaction data chunk DRDY asserted state or Long for more extensive information about the phases Display Deferred Pairing consolidates the deferred reply transaction information directly beneath the original deferred transaction Display Read Write ECC Errors examines the D 63 00 and DEP 7 0 signals during DRDY asserted states a...

Страница 48: ...HP 16505A Pentium II Preferences Dialog Figure 17 Using the Inverse Assembler Pentium II preferences dialog Preprocessor Interface for the Pentium II Processor 2 17 ...

Страница 49: ...Compacted Clock Qualifier Filter Show Agents Show All Show Transactions Show All except Code Reads Show Phases Request A Phase Preferences Display Disassembly ON Display Branch Trace Details OFF Transaction Format SHORT Display Deferred Pairing ON Display Read ECC Errors OFF Display Write ECC Errors ON HP 16505A Listing window for Software Analysis Figure 18 Using the Inverse Assembler Analysis te...

Страница 50: ... at the branch target address The disassembly software finds matching code reads between the current BTM and the next matching BTM reorders any out of order bursts then disassembles the code read data In searching for code reads any fetches which are deferred are automatically paired with their corresponding deferred replies to ensure that all code read data is found This pairing is not affected b...

Страница 51: ...te Enabled Disabled INIT Built in Self Test Enabled Disabled A8 AERR Observation Policy Enabled Disabled A9 BERR Observation Policy Enabled Disabled A10 BINIT Observation Policy Enabled Disabled A7 In order Queue depth 1 8 A6 Power on Reset Vector 000FFFF0 or FFFFFFF0 hex A5 FRC Mode Enabled Disabled A 12 11 APIC Cluster ID 00 01 10 11 Reset Configuration Figure 19 2 20 Preprocessor Interface for ...

Страница 52: ...pt for Interrupt Acknowledge and Special Transactions which are combined into one symbol Triggering on data and transaction type There is no guaranteed method of triggering on a particular transaction type or address ANDed with a particular data value in a target system with overlapping transactions Although the Listing displays a transaction type and 8 byte data value on the same line when Transa...

Страница 53: ...2 22 Preprocessor Interface for the Pentium II Processor ...

Страница 54: ...3 Preprocessor Interface Hardware Reference ...

Страница 55: ...e HP E2466C hardware including the characteristics and signal mapping for the preprocessor interface This chapter also includes a brief theory of operation circuit board dimensions and information on servicing the preprocessor interface 3 2 Preprocessor Interface for the Pentium II Processor ...

Страница 56: ...mplitude 800 mV p p minimum for all GTL signals Logic Analyzers Supported 16550A two card module 16554A three card module 16555A D three card module 16556A D three card module Accessories Required None Timing Analysis 3 nS channel to channel skew typical Power Requirements Supplied by the logic analyzer Probes Required Ten logic analyzer pods are required for transaction tracking Signal Line Loadi...

Страница 57: ... 4 600 m 15 000 ft 15 300 m 50 000 ft Humidity Up to 90 noncondensing Avoid sudden extreme temperature changes which could cause condensation within the instrument Table 7 Product Regulations Safety IEC 348 EN 61010 1 1993 UL 1244 CSA Standard C22 2 No 231 Series M 89 Preprocessor Interface Hardware Reference Operating Characteristics 3 4 Preprocessor Interface for the Pentium II Processor ...

Страница 58: ...ating mode The CMOS model applies to the following list of signals Table 8 CMOS Inputs 3 3V Tolerant APIC Group JTAG Group A20M FERR FLUSH IERR IGNNE INIT LINT0 INTR LINT1 NMI PREQ SMI STPCLK PICCLK PICD1 PICD0 TCLK TRST TMS TDI TDO Signal Line Loading Figure 20 Preprocessor Interface Hardware Reference Signal line loading Preprocessor Interface for the Pentium II Processor 3 5 ...

Страница 59: ... latency to move the information from the processor pins to the logic analyzer memory except for the three bus signals on connector P1 which only require two clocks The first clock is used to capture all of the bus signals in latches on the preprocessor The second clock is used to move the bus signals from the preprocessor latches into the logic analyzer slave register The slave latches exists wit...

Страница 60: ...e logic analyzer The following signals however are always buffered instead of latched APIC JTAG groups A20M FERR FLUSH IERR IGNNE INIT LINT0 INTR LINT1 NMI PREQ SMI STPCLK Timing Mode Operation The HP E2466C acts as a buffer in timing mode The buffer in the preprocessor passes each Pentium II processor signal to the logic analyzer regardless of the state of BCLK The slave latch within the logic an...

Страница 61: ...HP E2466C Block Diagram HP E2466C Block Diagram Figure 21 Preprocessor Interface Hardware Reference HP E2466C Block Diagram 3 8 Preprocessor Interface for the Pentium II Processor ...

Страница 62: ...descriptions are as follows PREPROCESSOR NAME The preprocessor connector that carries the signal CONNECTOR PIN The pin within the preprocessor connector that carries the signal BIT The bit position of the signal within the preprocessor connector CPU SIGNAL The microprocessor signal name ANALYZER LABEL S The analyzer label assigned to the signal Lower case letters indicate a preprocessor generated ...

Страница 63: ...11 D13 INIT INIT P1 13 D12 P1 15 D11 P1 17 D10 P1 19 D9 P1 21 D8 P1 23 D7 P1 25 D6 P1 27 D5 P1 29 D4 P1 31 D3 P1 33 D2 P1 35 D1 P1 37 D0 These signals are generated by the preprocessor interface These signals are buffered not latched in State mode Preprocessor Interface Hardware Reference Signal to Connector Mapping 3 10 Preprocessor Interface for the Pentium II Processor ...

Страница 64: ...2 13 D12 BR0 BR P2 15 D11 BPRI BPRI P2 17 D10 BNR BNR P2 19 D9 LOCK LOCK P2 21 D8 ADS ADS P2 23 D7 P2 25 D6 P2 27 D5 P2 29 D4 P2 31 D3 P2 33 D2 HIT HIT P2 35 D1 HITM HITM P2 37 D0 DEFER DEFER These signals are generated by the preprocessor interface Preprocessor Interface Hardware Reference Signal to Connector Mapping Preprocessor Interface for the Pentium II Processor 3 11 ...

Страница 65: ...D31 00 P3 13 D12 D12 D31 00 P3 15 D11 D11 D31 00 P3 17 D10 D10 D31 00 P3 19 D9 D9 D31 00 P3 21 D8 D8 D31 00 P3 23 D7 D7 D31 00 P3 25 D6 D6 D31 00 P3 27 D5 D5 D31 00 P3 29 D4 D4 D31 00 P3 31 D3 D3 D31 00 P3 33 D2 D2 D31 00 P3 35 D1 D1 D31 00 P3 37 D0 D0 D31 00 Preprocessor Interface Hardware Reference Signal to Connector Mapping 3 12 Preprocessor Interface for the Pentium II Processor ...

Страница 66: ... P4 13 D12 D28 D31 00 P4 15 D11 D27 D31 00 P4 17 D10 D26 D31 00 P4 19 D9 D25 D31 00 P4 21 D8 D24 D31 00 P4 23 D7 D23 D31 00 P4 25 D6 D22 D31 00 P4 27 D5 D21 D31 00 P4 29 D4 D20 D31 00 P4 31 D3 D19 D31 00 P4 33 D2 D18 D31 00 P4 35 D1 D17 D31 00 P4 37 D0 D16 D31 00 Preprocessor Interface Hardware Reference Signal to Connector Mapping Preprocessor Interface for the Pentium II Processor 3 13 ...

Страница 67: ...32 P5 13 D12 D44 D63 32 P5 15 D11 D43 D63 32 P5 17 D10 D42 D63 32 P5 19 D9 D41 D63 32 P5 21 D8 D40 D63 32 P5 23 D7 D39 D63 32 P5 25 D6 D38 D63 32 P5 27 D5 D37 D63 32 P5 29 D4 D36 D63 32 P5 31 D3 D35 D63 32 P5 33 D2 D34 D63 32 P5 35 D1 D33 D63 32 P5 37 D0 D32 D63 32 Preprocessor Interface Hardware Reference Signal to Connector Mapping 3 14 Preprocessor Interface for the Pentium II Processor ...

Страница 68: ... P6 13 D12 D60 D63 32 P6 15 D11 D59 D63 32 P6 17 D10 D58 D63 32 P6 19 D9 D57 D63 32 P6 21 D8 D56 D63 32 P6 23 D7 D55 D63 32 P6 25 D6 D54 D63 32 P6 27 D5 D53 D63 32 P6 29 D4 D52 D63 32 P6 31 D3 D51 D63 32 P6 33 D2 D50 D63 32 P6 35 D1 D49 D63 32 P6 37 D0 D48 D63 32 Preprocessor Interface Hardware Reference Signal to Connector Mapping Preprocessor Interface for the Pentium II Processor 3 15 ...

Страница 69: ... A31 00 P7 15 D11 A11 A31 00 P7 17 D10 A10 A31 00 P7 19 D9 A09 A31 00 P7 21 D8 A08 A31 00 P7 23 D7 A07 A31 00 P7 25 D6 A06 A31 00 P7 27 D5 A05 A31 00 P7 29 D4 A04 A31 00 P7 31 D3 A03 A31 00 P7 33 D2 A02 tied high A31 00 P7 35 D1 A01 tied high A31 00 P7 37 D0 A00 tied high A31 00 Preprocessor Interface Hardware Reference Signal to Connector Mapping 3 16 Preprocessor Interface for the Pentium II Pro...

Страница 70: ... P8 13 D12 A28 A31 00 P8 15 D11 A27 A31 00 P8 17 D10 A26 A31 00 P8 19 D9 A25 A31 00 P8 21 D8 A24 A31 00 P8 23 D7 A23 A31 00 P8 25 D6 A22 A31 00 P8 27 D5 A21 A31 00 P8 29 D4 A20 A31 00 P8 31 D3 A19 A31 00 P8 33 D2 A18 A31 00 P8 35 D1 A17 A31 00 P8 37 D0 A16 A31 00 Preprocessor Interface Hardware Reference Signal to Connector Mapping Preprocessor Interface for the Pentium II Processor 3 17 ...

Страница 71: ...7 DEP P9 13 D12 DEP6 DEP P9 15 D11 DEP5 DEP P9 17 D10 DEP4 DEP P9 19 D9 DEP3 DEP P9 21 D8 DEP2 DEP P9 23 D7 DEP1 DEP P9 25 D6 DEP0 DEP P9 27 D5 AP1 AP P9 29 D4 AP0 AP P9 31 D3 A35 A35 32 P9 33 D2 A34 A35 32 P9 35 D1 A33 A35 32 P9 37 D0 A32 A35 32 Preprocessor Interface Hardware Reference Signal to Connector Mapping 3 18 Preprocessor Interface for the Pentium II Processor ...

Страница 72: ...15 D11 DRDY DRDY P10 17 D10 DBSY DBSY P10 19 D9 AERR AERR P10 21 D8 BERR BERR P10 23 D7 BINIT BINIT P10 25 D6 RESET RESET P10 27 D5 PREQ PREQ P10 29 D4 PRDY PRDY P10 31 D3 BP3 BP3 P10 33 D2 BP2 BP2 P10 35 D1 BPM1 BPM1 P10 37 D0 BPM0 BPM0 These signals are buffered not latched in State mode Preprocessor Interface Hardware Reference Signal to Connector Mapping Preprocessor Interface for the Pentium ...

Страница 73: ... PICD1 5 6 GND TDI 5 4 GND PICD0 3 4 GND TMS 3 2 GND PICCLK 1 2 GND TCK 1 Refer to chapter 1 for additional information on connecting to these signals The preprocessor interface captures but does not display the REQ 4 0 bus signal group Preprocessor Interface Hardware Reference Signal to Connector Mapping 3 20 Preprocessor Interface for the Pentium II Processor ...

Страница 74: ...e dimensions for the preprocessor interface assembly The dimensions are listed in inches and millimeters HP E2466C Dimensions part 1 of 2 Figure 22 Preprocessor Interface Hardware Reference Circuit Board Dimensions Preprocessor Interface for the Pentium II Processor 3 21 ...

Страница 75: ...HP E2466C Dimensions part 2 of 2 Preprocessor Interface Hardware Reference Circuit Board Dimensions 3 22 Preprocessor Interface for the Pentium II Processor ...

Страница 76: ... been set up on the Exchange Assembly program This allows you to exchange a faulty assembly with one that has been repaired calibrated and performance verified by the factory The cost is significantly less than that of a new assembly Table 10 Replaceable Parts HP Part Number Description E2466 69509 Preprocessor Interface Circuit Board E2466 68707 Software disk pouch E2466 61601 Probe Cable E2466 6...

Страница 77: ...3 24 Preprocessor Interface for the Pentium II Processor ...

Страница 78: ...A If You Have a Problem ...

Страница 79: ...olutions If you still have difficulty using the analyzer after trying the suggestions in this chapter please contact your local Hewlett Packard service center C AU TI O N When you are working with the analyzer be sure to power down both the analyzer and the target system before disconnecting or connecting cables probes and preprocessors Otherwise you may damage circuitry in the analyzer preprocess...

Страница 80: ...essor interface or poor probe connections Check that the logic analyzer threshhold is set for TTL levels Use an oscilloscope to check the signal integrity of the data lines Clock signals for the state analyzer must meet particular pulse shape and timing requirements Data inputs for the analyzer must meet pulse shape and setup and hold time requirements See Also See Capacitive Loading in this chapt...

Страница 81: ...ur analysis specification is not correct for the data you want to capture or that the trace memory is only partially filled Check your analysis sequencer specification to ensure that it will capture the events of interest Try stopping the analyzer if the trace list is partially filled this should display the contents of trace memory If You Have a Problem No activity on activity indicators A 4 Prep...

Страница 82: ...em 1 Power up the analyzer and preprocessor 2 Power up the target system If you power up the target system before you power up the preprocessor interface circuitry in the preprocessor may latch up and prevent proper target system operation Verify that the microprocessor and the preprocessor interface are properly rotated and aligned so that the index pin on the microprocessor such as pin 1 or A1 m...

Страница 83: ...to unacceptable levels If the target system design has close timing margins such loading may cause incorrect processor functioning and give erratic trace results Ensure that you have sufficient cooling for the microprocessor Capacitive loading Excessive capacitive loading can degrade signals resulting in incorrect capture by the preprocessor interface or system lockup in the microprocessor All pre...

Страница 84: ...ble numbers Preprocessors must supply address data and status information to the analyzer in a predefined order The cable connections for each preprocessor are often altered to support that need Thus one preprocessor might require that you connect cable 2 to analyzer pod 2 while another will require you to connect cable 5 to analyzer pod 2 See Chapter 1 for connection information Check the activit...

Страница 85: ...s Transaction tracker inverse assembler errors and warnings no data displayed in the transaction display It is common for transactions near the end of the acquisition to be clipped such that not all data phases are captured In this case any data states which are missing will be indicated by a row of asterisks appears next to a disassembled instruction Branch Trace Messages normally guarantee accur...

Страница 86: ...n The logic analyzer cables are not connected properly to the preprocessor interface pp error sync lost reset target pp error rcnt invalid reset target pp error scnt invalid reset target The preprocessor interface hardware tracks the processor bus from reset If the logic analyzer is turned off while the target is on or if the preprocessor switches are changed while the target is on synchronization...

Страница 87: ...mber of states to the next BTM exceeds the internal search limit it will be treated as missing ia warning disassembly requires Branch Trace With Display Disassembly selected in the Preferences dialog a code read from the reset vector is treated as a virtual Branch Trace Message and normally begins a block of disassembled instructions This warning indicates that the next real BTM is not found To co...

Страница 88: ...ight after the analyzer s trigger state If the pulse occurs too soon after the analyzer s trigger state the oscilloscope will miss the pulse Adjust the skew in the Intermodule menu You may be able to specify a skew value that enables the event to be captured Change the trigger specification for modules upstream of the one with the problem If you are using a logic analyzer to trigger the scope try ...

Страница 89: ...HP 16550B cards Ensure that your cable connections match the silk screening on the card Then repeat the measurement See Also The HP 16550B Logic Analyzer Service Guide No Configuration File Loaded This is usually caused by trying to load a configuration file for one type of module system into a different type of module system Verify that the appropriate module has been selected from the Load modul...

Страница 90: ...in the HP 16500B C or HP 16501A frame Ensure that the cards are firmly seated This error might occur if the target system is not running properly Ensure that the target system is on and operating properly If the error message persists check that the logic analyzer pods are connected to the proper connectors on the preprocessor interface See Chapter 1 to determine the proper connections If You Have...

Страница 91: ...d the system does not have the data it needs to calculate the time between module triggers The system must know this time to be able to display data from multiple modules on a single screen Waiting for Trigger If a trigger pattern is specified this message indicates that the specified trigger pattern has not occurred Verify that the triggering pattern is correctly set If You Have a Problem Time fr...

Страница 92: ... software or interfacing unauthorized modification or misuse operation outside of the environmental specifications for the product or improper site preparation or maintenance No other warranty is expressed or implied Hewlett Packard specifically disclaims the implied warranties or merchantability and fitness for a particular purpose Exclusive Remedies The remedies provided herein are the buyer s s...

Страница 93: ...s product at the time the manual or update was issued Many product updates and fixes do not require manual changes and conversely manual corrections may be done without accompanying product changes Therefore do not expect a one to one correspondence between product updates and manual updates The following list of pages gives the date of the current edition and of any changed pages to that edition ...

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