HP 8112A, Руководство по эксплуатации, программированию и обслуживанию

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Byte offset latches and
Offset DAC
Note
Reciprocal operation
R
0V
0V
2R
- va
Figure 1 0.5-2. DAC - Reciprocal operation
The remaining DACs operate in a similar manner to the amplitude
control but are set up to produce an output which is the reciprocal of
the input value. Refer to Figure 10.5-2. The currents summed at the
inverting input of the op-amp can be expressed as:
"Va "Va "Va "Vref
2R + 4R + 8R
= -R
Therefore:
8
"Va
=
-7
VreJ
Although this description describes output in terms of offset and
amplitude, instrument output levels are programmed as high and low
levels (HI1, 101).
Refer to Figure 10.5-4 and Figure 10.5-1.
Byte Latching
U20 has no internal latches and, since the DAC output must be
available continuously and simultaneously with the amplitude DAC
output, external latches are provided
(
See Figure 10.5-3). The low
and high bytes of the offset value are loaded seperately from the
latched-data bus into latches U19 and U l 7 using the negative edges
of 1BO and HBO to enable the latches. The 1RC (WS2) signal is
then used to pass the data to U20 via U27 and U18 simultaneously
as a 12-bit word. The 1RC signal is also inverted by U15 and used to
enable the amplitude DAC U23. Therefore the microprocessor can
prepare new data for U20 and U23 before enabling both with WS2.
Servicing the Control Board 1 0.5-3