HP 8112A, Руководство по эксплуатации, программированию и обслуживанию, Страница: 221 / 406

Note
Width Generator
Table 1 0.3-12. Delay Generator Operation
U220 Pin Mnemonic Description State
5
DELC
Delay control voltage input L
2 ERD Delay error output signal L
10 DIC Delay input store select See Table 10.3-1
11 to 18 LD7 - LDO Data to be latched into See Table 10 .3-2
the input store of U220
R226
DVC Delay vernier current See Table 10.3-13
6. Verify that voltage at U220 pins 1 , 4 and 5 are at virtual ground
(
min. -40 m V max. 0 V
)
Delay Vernier Current can be checked by measuring the voltage
across R226.
7. Set HP 8 1 12A PER to 20 ms
8. Check the Delay Generator levels against Table 10.3-13
Table 10.3-13. Delay Generator Signal Levels
DEL Setting Voltage across R226
1 ms +0.16
v
5 ms
+0.003
v
9.99
ms
-0.02
v
1 . Set up the HP 81 12A as follows:
RCL
DEL
DBL
0
650 µs
OT
200 µs
2. Check the input signal from the delay generator at TP2
(
pin
7
of
U240 against Figure 10.3-13.
I
i.._ DBL
I
2 00u s
I
L
_ _
J.---
DEL 6 5 0 u s
----./
Figure 1 0.3-13. Width Generator Input
3. Check the ramp signal at pin 20 of U240 against Figure 10.3- 14.
Servicing the Timing and 1 0.3-1 9
Slope Generators