2 SPECIFICATIONS OF INDIVIDUAL MODULES
2-22
2.18 Model LWC401 Counter Module (Pulse Counter, 20 kHz,
Counting from -8,192 to +8,191)
Item Specification
Counter inputs
2-phase input (up/down counting)
1-phase input (up counting)
Stop input (disabling pulse input when turned on, and enabling it
when turned off and latched)
Input channels
1
Insulation method Photocoupler
Input frequency
20 kHz or less, voltage or no-voltage transistor input
(Duty ratio 50%)
Filter time constant: approx. 5
μ
s
Data bits
14 (sign bit + 13 bits)
Counting range
-8,192 to +8,191
Comparison output
Count value <, =, or > set value
(Match output signal latched)
Voltage
transistor input
Logic 1
+10 V to +30 V
Logic 0
0 to +2 V
Input
impedance
Approx. 1.5 k
Ω
No-voltage
transistor input
Transistor ON
Not more than 100
Ω
or 1 V; transistor current, 5 to 20 mA
Transistor
OFF
Not less than 100 k
Ω
External
power supply
voltage
+10 to +30 V
Output signal
No-voltage transistor output, 24 V, 0.1 A or less
(External power supply voltage: 20 to 28 VDC)
ON/OFF delay time: 1 ms or less
Internal
consumption
current
12 VDC
40 mA
5 VDC
8 mA
Insulation withstand voltage
1,500 VAC, 1 minute (between external terminal and ground)
External wiring
Connection 20-point terminal block connector (Connector screw type: M3)
Applicable
cable size
0.5 to 1.25 mm
2
Tightening
torque
0.6 to 0.8 N·m
Maximum
wiring length
50 m (shielded twisted-pair cable)
Mass 340
g
It is often the case that the shield lead needs to be grounded on programmable-controller side.
In these cases, be sure to connect the shield lead to terminal 9 of this module and then to the
cubicle’s ground terminal.
When connecting a load to the comparison output, connect a 24 V ±4 V DC power supply
between the +V and C0/C1 terminals (C0 and C1 are intenally connected together).
S
C
A1
S
C
B1
C
STOP
S
C
A2
SHD
C0
C1
R>C
R=C
R<C
+V
S
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
10
LWC401 PCT
HITACHI
UP
DOWN
R>C
R=C
R<C
PULSE
COUNTER
Comparison data
register
SGC
SGC
SGC
SGC
Temporary
memory
circuit
Start
flip-flop
Reset signal
Interface
circuit
Counter
Encoder
Match
output
register
Control
circuit
Same as above
Same as above
Voltage regulator
circuit
2-phase
pulse input
Process side
Pulse input A1
Pulse input B1
Stop input STOP
1-phase
pulse input
Pulse input A2
Comparison
output
L
L
Count data
register
Up/Down
detector
S
C
S
C
S
C
S
C
C0
R
C
R>C
R=C
R<C
C1
R>C
R=C
R<C
L
Internal circuitry
+V
Station
module
Содержание HSC-2100
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