98
2.2.33 MULXU (multiply extend as unsigned)
Operation
Rd
×
Rs
→
Rd
Assembly-Language Format
MULXU Rs, Rd
Operand Size
Byte
Condition Code
I
H
N
Z
V
C
—
—
—
—
—
—
—
—
I:
Previous value remains unchanged.
H:
Previous value remains unchanged.
N:
Previous value remains unchanged.
Z:
Previous value remains unchanged.
V:
Previous value remains unchanged.
C:
Previous value remains unchanged.
Description
This instruction performs 8-bit
×
8-bit
→
16-bit multiplication. It multiplies a destination
register by a source register and places the result in the destination register. The source register
is an 8-bit register. The destination register is a 1 6-bit register containing the data to be
multiplied in the lower byte. (The upper byte is ignored). The result is placed in both bytes of
the destination register. The operation is shown schematically below.
Don't - care Multiplicand X Multiplier Product
Rd Rs Rd
8 bits 8 bits 16 bits
The multiplier can occupy either the upper or lower byte of the source register.
Instruction Formats and Number of Execution States
Instruction code
Addressing
mode
Mnem.
Operands
1st byte
2nd byte
3rd byte
4th byte
No. of
states
Register direct
MULXU
Rs,Rd
5
0
rs
0
rd
14
Содержание H8/300L Series
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