Hitachi DV-P345E, Руководство по обслуживанию

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DACTEST[6] I DACs test input
VID[5] // O // Digital video luma/chroma output, multiplexed in time according to the
CCIR656 standard (for interlaced video) or luma (for progressive) //
ICETDO // O // ADP debug interface //
130 DJTDO // O // DSP debug interface //
IDGPCI/O[1]// I/O // General purpose input/output pin, monitored/controlled by the CPU or DSP
SW. When input, the pin can be used as general purpose external interrupt
to the DSP//
DACTEST[5] I DACs test input
VID[4] // O // Digital video luma/chroma output, multiplexed in time according to the
CCIR656 standard (for interlaced video) or luma (for progressive) //
ICETCK // I // ADP debug interface /
131 DJTCK // I // DSP debug interface //
GPCI/O[27]// I/O // General purpose input/output pin, monitored/controlled by the CPU or DSP
SW //
DACTEST[4] I DACs test input
VID[3] // O // Digital video luma/chroma output, multiplexed in time according to the
CCIR656 standard (for interlaced video) or luma (for progressive) //
DJTMS // I // DSP debug interface //
132 GPCI/O[28]// I/O // General purpose input/output pin, monitored/controlled by the CPU or DSP
SW //
DACTEST[3] // I // DACs test input //
SERVOCLK O SERVO channel clock output for AFE by-pass
VID[2] // O // Digital video luma/chroma output, multiplexed in time according to the
CCIR656 standard (for interlaced video) or luma (for progressive) //
DJTDI // I // DSP debug interface //
133 GPCI/O[29]// I/O // General purpose input/output pin, monitored/controlled by the CPU or DSP
SW //
DACTEST[2] // I // DACs test input //
SSEL[0] O SERVO channel select output for AFE by-pass
VID[1] // O // Digital video luma/chroma output, multiplexed in time according to the
CCIR656 standard (for interlaced video) or luma (for progressive) //
DJTDO // O // DSP debug interface //
134 GPCI/O[30]// I/O // General purpose input/output pin, monitored/controlled by the CPU or DSP
SW //
DACTEST[1] // I // DACs test input //
SSEL[1] O SERVO channel select output for AFE by-pass
VID[0] // O // Digital video luma/chroma output, multiplexed in time according to the
CCIR656 standard (for interlaced video) or luma (for progressive) //
DJTCK // I // DSP debug interface //
135 ICGPCI/O[3]// I/O // General purpose input/output pin, monitored/controlled by the CPU or DSP
SW. When input, the pin can be used as general purpose external interrupt
to the CPU //
DACTEST[0] // I // DACs test input //
SSEL[2] O SERVO channel select output for AFE by-pass
VCLKx2 // O // Digital video clock output. 27.000MHz //
COSYNC // O // Composite sync output. Active only when component analog output is
selected //
ICGPCI/O[1]// I/O // General purpose input/output pin, monitored/controlled by the CPU or DSP
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