ID2000 Series Smart Code Reader User Manual
23
Output
Level High
Internal
Logic
Output
Level Low
TR
TDR
TDF
TF
50%
50%
50%
50%
10%
10%
90%
90%
Figure 3-19 Output Logic Level
Table 3-8 Output Electrical Feature
Parameter Name
Parameter Symbol
Value
Output Logic Level Low
VL
730 mV
Output Logic Level High
VH
3.2 VDC
Output Falling Delay
TDF
6.3 μs
Output Rising Delay
TDR
68 μs
Output Falling Time
TF
3 μs
Output Rising Time
TR
60 μs
3.2.3 Input Signal Wiring
The device can receive the external input signal via I/O interface, and this section introduces input
signal wiring.
Note
●
Input signal wiring may differ by external device types.
●
The supplied 17-pin cable has pull-up and pull-down resistors.
●
The voltage of VCC should be equal to or less than that of PWR. Otherwise, the output signal
exception may occur.
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