8
EXTERNAL SYNCHRONIZATION OF CCD
External Synchronization by HD and VD
External Synchronization Input Conditions
TAPPC0086EA
TAPPC0087EA
When carrying out data processing using an image processor, it is necessary to match the CCD's synchroniza-
tion with the image processor. In the camera control unit, such synchronization matching is accomplished by a
horizontally synchronizing signal (HD), a vertically synchronizing signal (VD).
Figure shows the input conditions of externally synchronizing pulses (HD, VD). When receiving external HD and VD pulses, the inter-
nal synchronization mode automatically switches to the external synchronization mode. Odd and even fields are determined by the
input timing of a VD pulse with respect to an pulse.
As Figure shows, when the VD fall time between the advance phase of 15.2
µ
s and the delay phase of 16.5
µ
s with respect to the HD
fall edge, odd fields come in effect. When the VD fall edge with respect to a half point from the HD fall time is between the advance
phase of 15.2
µ
s and the delay phase of 16. 5
µ
s, even fields come in effect.
Long time exposure by restart reset (available for the C5909-06, -07, -08, -09, -10, -11, -12, -13)
HD and reset pulse input conditions
Restart reset (R. R.) allows extracting information on single image at the desired time width and time. The R. R. mode is enabled by
turning on the PRINT switch on the top of the camera. Output can be obtained by supplying HD and reset signals to pins No. 6 and
No. 7 of the 12-pin connector respectively.
The HD and reset signals must be supplied when the PRINT switch is turned on. The C6687 camera controller (option) provides the
HD and reset signal output, facilitating long time exposure operation on the CCD chip.
15.2
µ
s 16.5
µ
s
(218)
(236)
15.2
µ
s 16.5
µ
s
(218)
(236)
1H
1/2H
* The figures within ( ) are the number of clocks.
HD
VD
ODD
FIELD
VD
EVEN
FIELD
63.5
µ
s
(910)
HD....pulse height: 2 V p-p to 4 V p-p
Input impedance: 1 k
Ω
TTL pulse width: 10
µ
s or over
Frequency: 15.734 kHz +0.157 34 kHz
VD....pulse height: 2 V p-p to 4 V p-p
Input impedance: 1 k
Ω
TTL pulse width: 200
µ
s or over
Frequency: 59.94 Hz +0.5994 Hz
Continuous
Pulse
2 to 4 pulses (depends on operation mode)
●
Frequency (cycle)
•HD 15.734 kHz
±
0.157 34 kHz (63.56
µ
s
±
0.6356
µ
s)
[CCIR: 15.625 kHz
±
0.156 25 kHz (64
µ
s
±
0.64
µ
s)]
●
Phase
•Same as the HD, VD mode phase conditions. Refer to their conditions.
•VD 244 to 1023 1/2 H [CCIR: 294 to 1023 1/2 H]
63.5
µ
s
[64
µ
s]
Desired time from 244 to 1023 1/2H [CCIR: 294 to 1023 1/2H]
2 to 4 pulse
