GOWIN DK_START_GW2A-LV18PG256C8I7_V2.0, Руководство пользователя

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2 Development Board Description 2.5 Features
DBUG385-1.1E 6(23)
2.5 Features
The key features of DK_START_GW2A-LV18PG256C8I7_V2.0 are as
follows:
1.
The FPGA device

GW2A-LV18PG256C8/I7

Max. user I/O 207
2.
Download and Boot

Integrates the download module; can be downloaded with the USB
Mini B cable

External Flash boot

The blue DONE light is on after loading
3.
Power

External 5V 2A Power supply

The blue POWER light is on after power on

The development board generates 3.3V, 2.5V, 1.5V, 1.2V, 1.0V,
and 0.75V (required by DDR3)
4.
Clock system

50MHz crystal oscillator Input

External signals input
5.
Memory device

2Gbit DDR3 SDRAM

64Mbit FLASH
6.
Ethernet interface

Two Ethernet interfaces

Supports 10M/100M/1000M

RJ45 connector with built-in transformer
7.
LVDS interfaces;

One LVDS interface for receiving, including five pairs of differential
signals.

One LVDS interface for sending, including five pairs of differential
signals.

The receiving/sending functions can be modified by changing the
resistance.
Note
！
For the V2.0 development board, J13 needs to be set as 2.5V when LVDS is used.
8.
SD card slot