GE marquette MAC 1100, Инструкции по обслуживанию

Страница: 15 / 92

Marquette Hellige GmbH MAC 1100/1200 V 1.1 Page
15
227 492 20 D - 0002
2.3.4 Controller core
The actual core comprises the Motorola Power PC MPC821, which contains the
following integrated components:
chipselect logic
DRAM controller
SCC and SMC for RS-232
LCD controller
SPI Interface
I/O ports
Real-Time Clock counter register
In addition, the MPC821 contains a JTAG port with test and programming
capabilities.
The MPC821 has the following additional power supplies:
VDDSYN, filtered from the + 3.3V logic supply, for the clock generation.
KAPWR, generated from the + 3.3V logic supply, or from a battery when device is
off, used for buffering the RTC Counter Register.
The clock generation for the MPC821 is realized by a quartz oscillator with
32.768KHz. The system clock CLOCKOUT is adjusted with the internal PLL register.
The system frequency is 25 MHz.
The Watchdog /Reset Generation is implemented separately in an integrated
system monitoring chip. It has the following functions:
Power-up reset for the MPC821 when the device is switched on
Voltage monitoring of the + 3.3V and + 5V, with reset generation
Watchdog
Switchover to battery supply for patient ECG memory when device is switched off
Signal for access protection for patient ECG memory when device is switched off
The Reset Configuration defines startup conditions like boot port size and clock
generation source.
Four LEDs indicate the device status in addition:
LED1:
active when a HRESET_ occurs
LED2: indicator for the logic supply
LED3, LED4: indicate internal software states
The control register comprises device control signals to switch off the device,
control battery charging and display control signals.
The status register contains information on the device hardware configuration and
the state of the battery charge.