Appendix A: Default Controller Configuration
26
Level
2
Level
3
Level
4
Level
5
Level
6
Level
7
Level
8
Notes
9600
9,600 Bd
4800
4,800 Bd
2400
2,400 Bd
1200
1,200 Bd
57.6
57,600 Bd
115.2
115,200 Bd
PRty
odd
Odd parity check used
EVEN
Even parity check used
NoNE
No parity bit is used
oFF
Parity bit is fixed as a zero
dAtA
8bIt
8 bit data format
7bIt
7 bit data format
StoP
1bIt
1 stop bit
2bIt
2 stop bits gives a “force 1” parity bit
AddR
Address for 485, placeholder for 232
SFty
PwoN
RSM
RUN on power up if not previously faulted
wAIt
Power on:
oPER
Mode, ENTER to run
RUN
RUN’s automatically on power up
RUN.M
dSbL
ENTER in
Stby, PAUS, StoP
runs
ENbL
ENTER in modes above displays RUN
SP.LM
SP.Lo
Low Setpoint limit
SP.HI
High Setpoint limit
SEN.M
Sensor Monitor
LPbk
dSbL
Loop break timeout disabled
ENbL
Loop break timeout value (MM.SS)
o.CRk
ENbl
Open Input circuit detection enabled
dSbL
Open Input circuit detection disabled
E.LAt
ENbl
Latch sensor error enabled
dSbL
Latch sensor error disabled
OUT.M
Output Monitor
oUt
1
oUt1
is replaced by output type
o.bRk
Output break detection
dSbL
Output break detection disabled
ENbl
P.dEV
Output break process deviation
P.tME
Output break time deviation
oUt
2
oUt2
is replaced by output type
oUt
3
oUt3
is replaced by output type
E.LAt
ENbl
Latch output error enabled