18
FinePix S3000 Service Manual
3-3.Explanation of Functions of Important Blocks
3-3-1.Technical Overview
The FinePix S3000 incorporates a 1/2.7 -inch square pixel, primary color interline CCD of 3.34 million pixels(total).
An [xD picture card] is adopted as the recording media.
Change point from S304/3800.
ICs are the [ACS2 (IC102)] for CCD processing, [KEY IC (IC800)] that incorporates power supply management capabilities into operation
system processing, and system LSI [XCS (IC203)] that pakeged signal processing, LCD drive, V-TG functions.
Lose related parts of the microphone and the speaker of S304/3800. Video-out (NTSC/PAL) is added.
3-3-2.Explanation of Functions of Individual Blocks
(1) CCD Signal Processing/Picture-taking Blocks (CCD BLOCK and CAM BLOCK)
The analog signals output by the CCD (1/2.7 square pixel, primary color interline CCD of 3.34 million pixels[total] [IC172]) undergo color
compensation, adaptive interpolation, amplification (ACG) and signal mixing in the [ACS2 (IC102)] CCD signal processing IC. After that, the
signals are converted into 12-bit digital signals and sent to the [XCS (IC203)] system LSI.
This block has a vertical drive IC (IC101) for driving the CCD.
(2) Motor Block (MOTOR BLOCK)
Upon receiving commands from operating switches, the [XCS (IC203)] signal processing LSI manages the motor drive IC (IC301) so as to
control the motors for AF, shutter, zoom and iris.
(3) Image Signal Processing Block (PROCESS BLOCK)
Input Data from the CCD
The 10-bit digital image data (equivalent to 1H) output by the image unit (CCD/CAM BLOCK) is sent to the [XCS (IC203)] system LSI. It is
here converted into 32-bit (16-bit x 2) data by the internal buffer of the LSI, and image data of 2048 x 1536 pix per frame is temporarily stored
in the [SDRAM (IC202 256 Mbit X16)] of the LSI.
Also, the 32-bit image data input to this LSI is used for calculations by the [auto calculation unit] and sent to the [ACS2 (IC102)] CCD
processing IC of the CAM BLOCK so as to obtain a suitable AE, AWB and AF.
(4) LCD UNIT
The digital signal sent from the [XCS (IC203)] system LSI is sent to the drive IC of the LCD UNIT via the processing unit on the LCD FPC of
the LCD UNIT, where [LCD drive] and [LCD panel tonal control] are performed.
(5) Power Supply Block (DCDC BLOCK)
The power supply block is built around the DC IC (IC601). It generates the below power supplies and supplies them to the individual blocks.
5 V
[(IC501), EVF-Drv(IC403), STRB IC (IC702),]
3.3 V
[XCS (IC203), ACS2 (IC102), V-Drv (IC101), FLASH ROM (IC204), STRB IC (IC702), MOTOR Drv (IC301),
SDRAM(IC202), KEY IC (IC800), KEY IO(IC501/502), xD Picture Card, MAIN PWB, KSW PWB,MSW PWB]
EV3
[MAIN PWB, KEY IC (IC800)]
A3.3V
[XCS (IC203), VIDEO Drv (IC350), CLK GEN (IC201), EVR (IC206), EVF-Drv(IC403), MAIN PWB, MSW PWB, LCD]
12 V
[CCD (IC172), V Drv (IC101)]
-8 C
[CCD (IC172), V Drv (IC101)]
Recording Processing to the xD Card
The image data stored in the [SDRAM (IC202 256 Mbit X16)] of the [XCS (IC203)] system LSI is sent to the signal processing block one line
at a time where it undergoes unpack processing (32-bit >> 10-bit conversion, processing required prior to digital clamping, ( compensation,
10-bit >> 8-bit R/G/B conversion) and YC processing (8-bit digital R/G/B signal >> Y:Cb:Cr = 4:2:2). The 8-bit Y/Cb/Cr data is then sent to the
[internal buffer]. In the [internal buffer], data is arranged in a format that is easy to convert the 8-bit Y/Cb/Cr data into DCT. After going through
the [JPEG calculation unit] and the [media controller], it is recorded on the xD card.
Image Reproduction from the xD Card
The compressed image data from the xD card is sent to the [XCS (IC203)] system LSI as 8-bit image data. It is then sent to the [media control
unit] >> [DRAM unit] >> [SDRAM (IC202 256 Mbit X16)] >> [media controller] >> [JPEG calculation unit] >> [signal processing unit]. The
[signal processing unit] does the post-processing of converting the 8-bit Y/Cb/Cr signals into 8-bit R/G/B signals. At the same time, it weighs
the text display signal and displays the text on the LCD UNIT via the [LCD controller].
Picture-taking system adjustment data is stored in the FLASH ROM (IC204).
Содержание Finepix S3000
Страница 7: ...7 1 3 Names of External Components ...
Страница 19: ...19 3 Schematics 3 4 Block Diagram ...
Страница 21: ...21 3 Schematics 3 6 Mounted Parts Diagrams 3 6 1 MAIN PWB ASSY Component Location SIDE A SIDE B ...
Страница 22: ...22 FinePix S3000 Service Manual 3 Schematics 3 6 2 DCDC PWB ASSY Component Location SIDE A SIDE B ...
Страница 25: ...25 3 Schematics 3 7 Circuit Diagrams 3 7 1 DCDC Block Circuit ...
Страница 26: ...26 FinePix S3000 Service Manual 3 Schematics 3 7 2 PROCESS Block Circuit ...
Страница 27: ...27 3 Schematics 3 7 3 CAM Block Circuit ...
Страница 28: ...28 FinePix S3000 Service Manual 3 Schematics 3 7 4 EVF Block Circuit ...
Страница 29: ...29 3 Schematics 3 7 5 STROB Block Circuit ...
Страница 30: ...30 FinePix S3000 Service Manual 3 Schematics 3 7 6 LCD Block Circuit ...
Страница 31: ...31 3 Schematics 3 7 7 MOTOR Block Circuit ...
Страница 32: ...32 FinePix S3000 Service Manual 3 Schematics 3 7 8 KEY IO Block Circuit ...
Страница 33: ...33 3 Schematics 3 7 9 KEY IC Block Circuit ...
Страница 34: ...34 FinePix S3000 Service Manual 3 Schematics 3 7 10 CCD Block Circuit 3 7 11 MSW Block Circuit ...
Страница 35: ...35 3 Schematics 3 7 13 RSW Block Circuit 3 7 12 KSW Block Circuit 3 7 14 VCON Block Circuit ...
Страница 54: ...54 FinePix S3000 Service Manual Step 6 Fig BATT5 4 Adjustments ...
Страница 66: ...66 FinePix S3000 Service Manual MEMO ...
Страница 82: ...26 30 Nishiazabu 2 chome Minato ku Tokyo 106 8620 Japan FUJI PHOTO FILM CO LTD ...