Mainboard User’s Manual
40
Chipset Features Setup
and the next byte of memory can be accessed while the current byte
is being refreshed. The default setting is “Disabled”.
DRAM Clock:
Enables the user to select the DRAM Clock.
Memory Hole:
If Set to “Enabled”, when the system memory size is
equal to or greater than 16M bytes, the physical memory address
from 15M to 16M will be passed to PCI or ISA and there will be a 1
MB hole in your system memory. This option is designed for some
OS with special add-in cards which need 15-16 MB memory space.
The default setting is “Disabled.”
PCI Master Pipeline Req:
The default is “Enabled.”
P2C/C2P Concurrency:
When disabled, the CPU bus is occupied
during the entire PCI operation period. The default is “Enabled.”
Fast R-W Turn Around
:
When this is enabled, the chipset will in-
sert one extra clock to the turn-around of back-to-back DRAM
cycles. Options are: The default is “Disabled
.”
System BIOS Cacheable:
When set to “Enabled” (default), the Sys-
tem BIOS will be cached for faster execution.
Video RAM Cacheable:
When enabled, the graphics card’s local
memory will be cached for faster execution. However, if any pro-
gram writes to this memory area, a system error may result. The
default is “Enabled.”
AGP Aperture Size (MB):
This option determines the effective size
of the AGP Graphic
Aperture
, where memory-mapped graphic data
structures are located.
AGP-4X Mode:
This item allows you to enable or disable the cach-
ing of display data for the video memory of the processor. Enabling
can greatly improve the display speed. If your graphics display card
does not support this feature, you need to disable this item. The de-
fault is “Enabled.”
AGP Driving Control:
This item can be used to signal driving cur-
rent on AGP cards to “Auto or “Manual.” Some AGP cards need
stronger than normal driving current in order to operate. The default
is “Auto.”
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