Freescale Semiconductor MCF5282, Дополнение к руководству пользователя

Страница: 8 / 18

MCF5282 User’s Manual Errata, Rev. 15
Errata for Revision 1.0
Freescale Semiconductor 8
Figure 6-2/6-4 Replace Figure 6-2, “CFM 512K Array Memory Map,” with the figure below.
Figure 6-2. CFM 512K Array Memory Map
Table 6-12/6-16 Change value for page erase verify command to 0x06.
Table 6-13/6-20 Change value for page erase verify command to 0x06.
Table 8-3/8-5 Add the following note the BDE bit description: “The SPV bit in the CPU’s RAMBAR must
also be set to allow dual port access to the SRAM. For more information, see Section
5.3.1, ‘SRAM Base Address Register (RAMBAR).’”
Figure 9-1/9-3 Remove
÷
2 from CLKGEN block.
10.3.6/10-11 Add this text to the end of the first paragraph: “If a specific interrupt request is completely
unused, the ICRnx value can remain in its reset (and disabled) state.”
10.5/10-17 Add the following note: “The wakeup mask level taken from LPICR[6:4] is adjusted by
hardware to allow a level 7 IRQ to generate a wakeup. That is, the wakeup mask value
used by the interrupt controller must be in the range of 0–6.”
Figure 12-4/12-8 Change CSCRn to reflect that AA is set to ‘1’ at reset.
13.5/13-15 Remove final paragraph. The paragraph incorrectly states that the MCF5282 does not have
a bus monitor.
Table 4. MCF5282UM Rev 1.0 Errata (continued)
Location Description
0x0007 FFFF
0x0004 000C
0x0000 0000
0x0000 0004
0x0000 0008
0x0000 000C
0x0003 FFFF
0x0004 0000
0x0004 0004
0x0004 0008
3H[1] 3L[1]
2H[1] 2L[1]
3H[0] 3L[0]
2H[0] 2L[0]
1H[1] 1L[1]
0H[1] 0L[1]
1H[1] 1L[1]
0H[0] 0L[0]
Logical Block 1 (256 Kbytes)
Memory
Array 2H
2H[31] 2L[31]
Memory
Array 2L
2H[0] 2L[0]
Flash Physical Block 2 Flash Physical Block 3
3H[31] 3L[31]
3H[0] 3L[0]
Memory
Array 3H
Memory
Array 3L
Logical Block 0 (256 Kbytes)
Memory
Array 0H
0H[31] 0L[31]
Memory
Array 0L
0H[0] 0L[0]
Flash Physical Block 0 Flash Physical Block 1
1H[31] 1L[31]
1H[0] 1L[0]
Memory
Array 1H
Memory
Array 1L
Each memory array = 64 Kbytes
(16 bits wide
×
32K)
Each physical block = 128 Kbytes
(32 bits wide
×
32K)
Configuration Field
(0x0000_0400–
0x0000_0417)