Getting to Know the Hardware
KTVR500UG Rev. 1.0 8/2014
Freescale Semiconductor, Inc.
7
3.6
Connectors and Terminal Blocks Description
Table 4
presents pin connection for each header present on the KITVR500EVM.
Table 3. Jumper Description
Jumper
Default
Description
J6
Closed
Shorts PVIN and SWVIN. Allows supply isolation to provide more accurate efficiency readings on the switching
supplies
J7
Closed
Shorts PVIN to VIN. Allows one to isolate or connect the 34VR500 logic input supply to PVIN net. (debugging option)
J8
Closed
Short EN to the MCU
J9
Open
Short to pull STBY to PVIN voltage supply
J10
Open
Short to hold EN pin low
J11
Open
Shorts SWVIN to VIN. Allows one to isolate or connect the 34VR500 logic input supply to SWVIN net. (debugging
option)
J12, J13, J14
Closed
Short to connect VLDOIN to VIN
J15
Closed
Short to connect SCL and SDA to the MCU
J16
Closed
Short to connect EN to PVIN
J17
1 - 2
VCCI2C Supply selector
• 1-2: Connect VCCI2C to 3V3 LDO
• 3-4: Connect VCCI2C to SW2 output
J19, J23, J24
Closed
Buck regulators input power path isolation
Short these jumpers to allow PVINx to be powered from the SWVIN supply
J22
1 - 2
3 - 4
Buck regulators input power path isolation
J25
2 - 3
Control Interface input supply selector
• 1-2: Enables PVIN node as the input supply source for the control interface
• 2-3: Enables USB power as the input supply source for the control interface
Table 4. Terminal Blocks Descriptions
Terminal Block
Function
Pin definition
J1
Main Input Supply
Pin 1 – GND
Pin 2 – PVIN
Pin 3 – SWVIN
J2
I²C Signals
Pin 1 – SCL
Pin 2 – SDA
J3
VCCI2C
Pin 1 – VCCI2C
Pin 2 – GND
J4
Interfacing 1
Pin 1 – INT_B
Pin 3 – POR_B
J5
Interfacing 2
Pin 1 – STBY
Pin 2 – EN
Pin 3 – GND
J18
LDO4 / LDO5
Pin 1 – LDO4 Output
Pin 2 – GND
Pin 3 – LDO5 Output
J21
LDO2 / LDO3
Pin 1 – LDO2 Output
Pin 2 – GND
Pin 3 – LDO3 Output
J27
REFOUT / LDO1
Pin 1 – REFOUT Output
Pin 2 – GND
Pin 3 – LDO1 Output
J29
SW1
Pin 1 – SW1 Output
Pin 2 – GND