FLY SP-770, Как в инструкции

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the level of output power.
The VBATT pin connects to an internal current-sense resistor and interfaces to an
integrated power amplifier control (iPAC™) function, which is insensitive to variations in
temperature, power supply, process, and input power. The ENABLE input allows initial
turn-on of PAM circuitry to minimize battery drain.
5. EXTERNAL DEVICE PART
5.1 External memory (
4M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA)
5.1.1 Feature
- 1.8V power supply.
- LVCMOS compatible with multiplexed address.
- Four banks operation.
- MRS cycle with address key programs.
-. CAS latency (1, 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
- EMRS cycle with address key programs.
- All inputs are sampled at the positive going edge of the system clock.
- Burst read single-bit write operation.
- Special Function Support.
-. PASR (Partial Array Self Refresh).
-. Internal TCSR (Temperature Compensated Self Refresh)
-. DS (Driver Strength)
-. DPD (Deep Power Down)
- DQM for masking.
- Auto refresh.
- 64ms refresh period (8K cycle)
- Commercial Temperature Operation (-25°C ~ 70°C).
- Extended Temperature Operation (-25°C ~ 85°C).
- 54Balls FBGA ( -RXXX -Pb, -BXXX -Pb Free).
5.1.1 Block Diagram & Description
The K4n56163PG is 268,435,456 bits synchronous high data rate Dynamic RAM
organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNG’s high
performance CMOS technology.
Synchronous design allows precise cycle control with the use of system clock and I/O
transactions are possible on every clock cycle. Range of operating frequencies,
programmable burst lengths and programmable latencies allow the same device to be
useful for a variety of high bandwidth and high performance memory system
applications
.