Festo CPS-Gate, Руководство по эксплуатации

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CPS Gate
48
© Festo Didactic 8075265
7 Technical data
Technical data
CPU
Processor Single-core Cortex A9, 800 MHZ
Real-time clock Included, buffered for up to 4 weeks by means of Gold-Cap
Memory 4 GByte RAM, 1 GByte flash
Buffering 1 MByte data retention in flash memory
Software/functionality
Operating system Embedded Linux 4.00
PLC programming CODESYS V3 (CS3)
HMI programming CODESYS V3 WebVisu (WV)
Ethernet TCP Modbus client or server Can be implemented via IEC library
EtherCAT master (optional) Integrated into CODESYS V3 (CS3)
CANopen master Can be implemented via IEC library
OPC UA (optional) Integrated into CODESYS V3 (CS3)
Electrical interfaces
X1 USB diagnostics (type B USB device socket)
X2 CAN in accordance with ISO11898 with electrical isolation, RJ45
X3 … X5 Ethernet interfaces, 100BASE-T, RJ45 with triple switch functionality
X6 Digital inputs DI0, DI1 Input voltage
Max. frequency
Input delay
Overvoltage
Power loss
Min. high voltage
Max. low voltage
24 V dc, EN 61131-2 type 1
100 Hz
≤ 10 ms
33 V
0.2 W per input
24 mA supply current per input
15 V
5 V
X7 Digital inputs DI2, DI3
X9 Digital inputs DI4, DI5
X10 Digital inputs DI6, DI7
X8 Digital outputs DO0, DO1,
power supply,
digital inputs/outputs
Output voltage
Output current
Total current
(per DIN)
Resistive load
Switching frequency,
ohmic/inductive
Short-circuit/thermal
protection,
current limiting,
fuse,
power loss
24 V dc, EN 61131-2 type 1
0.5 A
Max. 2 A ( at 50% duty cycle)
48 W nominal
100 Hz
0.7 per channel,
2 A for total current
0.2 W per output
X11 Digital outputs DO2, DO3,
CPU power supply