User Manual
DIC324
Setting the switches and jumpers at the time of delivery is shown in Figure 2-6 and
Figure
3.1.7
Connection to the module
Additional external devices should be connected to the module only in accordance with
the type of connection used for input digital signals (p. 3.2.2) and with the model list of
accessories and terminal boards, specified below.
The external devices should have interfaces with the voltage levels from 3.2 to 52
Volts, in this case the relevant voltage range of input digital signals is set by resistor
assemblies to the relevant pads XS2, XS3 (p. 3.2.3).
Connection of signal sources to the IDC XP10, XP11 type connectors of the module
is carried out using the connection cable ACS00003 (type FC34-60 ) and cable ACS00001
(type FC20-60) respectively.
For screw-
type connection of signal sources to the module terminal boards Fastwel®
TIB96601/TIB96401.
3.1.8
Module configuration
Module configuration involves an independent setting of switches and jumpers by
the user.
Proper setting of all the groups of switches and jumpers is required for correct and
proper installation of the module. General description of setting the switches and jumpers is
shown below.
ATTENTION:
IT IS REQUIRED TO MAKE SURE THAT ALL THE GROUPS OF
SWITCHES AND JUMPERS PRIOR TO THE FIRST MODULE'S
ACTIVATION HAVE BEEN SET PROPERLY!
3.2
Main control capabilities
The module is controlled using the registers via I/O ports, which designations
depend on the type of the diagram loaded (
D11
– basic option) within the FPGA1 matrix.
3.2.1
Setting base address
Selection of the base address on ISA bus (
), as well as the addressing method
(BASE Address Switch, Address mode) is performed with the use of SA1 switch; The switch
has 8 engines. Engines BA[5:0] of SА1 switch (which are specified in the Figure as: BA0 …
BA5) are intended for setting the base address (BA) of the module or segment of address
SA[9:4] in the I/O area (I/O), which will make the module available for the system. The
engine of the switch 8 is responsible for the type of addressing in DIC324 with regard to the
I/O address space with or without an offset.
27