© 2012 Fairchild Semiconductor Corporation 16
FEBFAN9611_S01U300A
• Rev. 0.0.1
9.
Inrush Current Limiting
The evaluation board includes an inrush current limiting circuit comprised of the highlighted
components shown in
Figure 15.
Figure 15. Inrush Current Limiting Circuit
Since the inrush current limiting circuit has a negative impact on light-load efficiency and may not
be required by all offline applications, the evaluation board is configured with the inrush circuit
fully populated, but disabled, as shown in Figure 15. R18 and R39 are installed on the PCB;
purposely electrically open. To enable and test the inrush current limiting circuit, rotate R18 and
R39 to complete the proper series connection shown in the schematic. Remove R38 to allow the
33
Ω
NTC thermistor (R15) to limit the inrush current during startup. Input current measurements
can be made by removing the R16, 0
Ω
jumper and installing a loop of wire connected to the holes
provided within the R16 PCB pad locations. A current probe can then be connected to the wire
loop. The effectiveness of the inrush current limiting function is shown below in Figure 16.
