Epson SED1751, Техническое руководство

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SED1751
MLS Driver Chip Set
EPSON
5–13
Technical Manual
The Power Supply
Method of Forming Each Voltage Level
VCC
GND
Logic System
LCD Controller
Capacitor
Coupling
Logic System LCD System
SED1580D
0B
Logic System LCD System
SED1751D
0B
VDDx
VSSx
VDDy
VSSy
V3
VC
VC
V1
–V1
V2
–V2
–V3
When the SED1580 and the SED1751 are used to form an extremely low power module system, the power
relationships as shown in the figure above between the SED1580 and SED1751 logic systems, and the LCD
system power supply, and the LCD controller power supply are optimal.
In this case, care is required when it comes to signal propagation in the logic system.
LCD Controller
→
SED1580 Direct
LCD Controller
→
SED1751 Capacitor coupling is required
SED1580
→
SED1751 Capacitor coupling is required
SED1751
→
SED1580 Capacitor coupling is required
Cautions at Power Up and Power Down
Because the voltage level in the LCD system is high voltage, if the logic system power supply of this LSI
is floating or if V
CC
is 2.6 V or less when the LCD system high voltage (30 V or above) is applied, or if
the LCD drive signal is output before the voltage level that is applied to the LCD system has stabilized,
then there is the risk that there will be an over current condition in this LSI, resulting in permanent damage
to this LSI.
It is recommended that the display OFF function (DOFF) is used until the LCD system voltage stabilizes
to insure that the LCD drive output power level is at the VC level.
Be sure to follow the sequences below when turning the power supplies ON and OFF:
When turning the power supply ON:
Logic system ON
→
LCD drive system ON, or simultaneously ON.
When turning the power supply OFF:
LCD drive system OFF
→
Logic system OFF, or simultaneously OFF.
As a countermeasure to guard against over current conditions, it is effective to insert a high-speed fuse or
a guard resistance in series with the LC power supply. The guard resistance value must be optimized
depending on the capacity of the LC cell.