SED1751
MLS Driver Chip Set
EPSON
5–11
Technical Manual
AC Characteristics
Input Timing Characteristics
The FR latched at the nth LP is reflected in the output at the n+1th LP.
t
DS
t
DH
t
SET
t
WCLH
t
WCLD
t
CCL
t
FFDS
t
FFDH
t
r
t
f
t
FRDS
t
FRDH
FR
F1, F2
LP
YD
CIO1, 2
(IN)
(V
CC
= +5.0 V
±
10%, Ta = –30 to +85
°
C)
Item
Signal
Parameter
Min
Max
Units
LP Frequency
t
CCL
500
ns
LP “H” Pulse Width
t
WCLH
55
ns
LP “L” Pulse Width
t
WCLL
330
ns
FR Setup Time
t
FRDS
100
ns
FR Hold Time
t
FRDH
40
F1, F2 Setup Time
t
FFDS
100
F1, F2 Hold Time
t
FFDH
40
Input Signal Rise Time
t
r
50
ns
Input Signal Fall Time
t
f
50
ns
CIO Setup Time
t
DS
100
ns
CIO Hold Time
t
DH
40
ns
YD
→
LP Allowable Time
t
SET
80
ns
(V
CC
= +2.7 V to 4.5 V, Ta = –30 to +85
°
C)
Item
Signal
Parameter
Min
Max
Units
LP Frequency
t
CCL
800
ns
LP “H” Pulse Width
t
WCLH
100
ns
LP “L” Pulse Width
t
WCLL
660
ns
FR Setup Time
t
FRDS
200
ns
FR Hold Time
t
FRDH
80
F1, F2 Setup Time
t
FFDS
200
F1, F2 Hold Time
t
FFDH
80
Input Signal Rise Time
t
r
100
ns
Input Signal Fall Time
t
f
100
ns
CIO Setup Time
t
DS
200
ns
CIO Hold Time
t
DH
80
ns
YD
→
LP Allowable Time
t
SET
150
ns
Содержание SED1751
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