Page 8
Epson Research and Development
Vancouver Design Center
S1D13700
S5U13700B00C Rev. 1.0 Evaluation Board User Manual
X42A-G-002-01
Issue Date: 2005/07/15
Revision 1.0
All S1D13700 configuration inputs (CNF[4:0]) are fully configurable using DIP switch S1
as described below.
Table 3-1: Summary of Configuration Options
SDU13700B00C
S1-[8:1]
Configuration
S1D13700
Pin
Configuration State
1 (ON)
0 (OFF)
S1-[8:7]
-
Not used
S1-[6]
AS#
Generic Bus or M6800 Family Bus Interface
M68K Family Bus Interface
S1-[5]
CNF4
Indirect Addressing Mode
Direct Addressing Mode
S1-[4:3]
CNF[3:2]
Selects the host bus interface as follows:
CNF3
CNF2
Host Bus
0
0
Generic Bus
0
1
Reserved
1
0
M6800 Family Bus Interface
1
1
MC68K Family Bus Interface
S1-[2:1]
CNF[1:0]
Selects the FPSHIFT cycle time (FPSHIFT:Clock Input) as follows:
CNF1
CNF0
FPSHIFT Cycle Time
0
0
FPSHIFT Divide 4:1
0
1
FPSHIFT Divide 8:1
1
0
FPSHIFT Divide 16:1
1
1
Reserved
= Required settings when using the PC Card adapter