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Epson Research and Development

Page 25

Vancouver Design Center

S5U13700B00C Rev. 1.0 Evaluation Board User Manual

S1D13700

Issue Date: 2005/07/15 

X42A-G-002-01

Revision 1.0

Figure 6-3: S5U13700B00C Schematics (3 of 3)

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Содержание S5U13700B00C

Страница 1: ...y download and use this document but only for your own use in evaluating Seiko Epson EPSON products You may not modify the document Epson Research and Development Inc disclaims any representation that the contents of this document are accurate or current The Programs Technologies described in this document may contain material protected under U S and or International Patent laws EPSON is a registe...

Страница 2: ...Page 2 Epson Research and Development Vancouver Design Center S1D13700 S5U13700B00C Rev 1 0 Evaluation Board User Manual X42A G 002 01 Issue Date 2005 07 15 Revision 1 0 ...

Страница 3: ...port 18 4 1 2 Host Bus Interface Support 18 4 2 LCD Panel Interface 20 4 3 Clock 20 5 Parts List 21 6 Schematic Diagrams 23 7 S5U13700B00C Board Layout 26 8 Connecting the S5U13700B00C to the PC Card Adapter 28 9 References 29 9 1 Documents 29 9 2 Document Sources 29 10 Technical Support 30 10 1 EPSON Mobile Graphics Engines S1D13700 30 10 2 Ordering Information 30 Appendix A Epson PC Card Extende...

Страница 4: ...Page 4 Epson Research and Development Vancouver Design Center S1D13700 S5U13700B00C Rev 1 0 Evaluation Board User Manual X42A G 002 01 Issue Date 2005 07 15 Revision 1 0 ...

Страница 5: ...is designed for connection to the Epson PC Card Extender S5UPCMCIAB00C thus providing an easy connection to a laptop or a desktop computer with a PC Card reader This module can also be used with other native platforms via the host connectors which provide the appropriate signals to support a variety of CPUs This user manual is updated as appropriate Please check the Epson Research and Devel opment...

Страница 6: ...C Rev 1 0 evaluation board includes the following features 64 pin TQFP13 S1D13700F0x Embedded Memory Graphics LCD Controller Headers for connecting to various Host Bus Interfaces or to the Epson PC Card Extender 0 1x0 1 header with all the LCD interface signals allowing connection to a LCD panel On board 32MHz crystal and option to use an oscillator instead of the crystal On board 3 3V regulator ...

Страница 7: ...00B00C evaluation board incorporates a DIP switch and 9 jumpers which allow configuration of the board 3 1 Configuration DIP Switches An 8 position DIP switch S1 is used to configure the S1D13700 for different Host Bus interfaces and to select the FPSHIFT cycle time The following figure shows the location of DIP switch S1 on the S5U13700B00C Figure 3 1 Configuration DIP Switch S1 Location DIP Swit...

Страница 8: ...ion State 1 ON 0 OFF S1 8 7 Not used S1 6 AS Generic Bus or M6800 Family Bus Interface M68K Family Bus Interface S1 5 CNF4 Indirect Addressing Mode Direct Addressing Mode S1 4 3 CNF 3 2 Selects the host bus interface as follows CNF3 CNF2 Host Bus 0 0 Generic Bus 0 1 Reserved 1 0 M6800 Family Bus Interface 1 1 MC68K Family Bus Interface S1 2 1 CNF 1 0 Selects the FPSHIFT cycle time FPSHIFT Clock In...

Страница 9: ...n 2 3 No Jumper JP1 HIOVDD Normal HIOVDD current measurement JP2 NIOVDD Normal NIOVDD current measurement JP3 COREVDD Normal COREVDD current measurement JP4 CLKI Source On Board Oscillator U2 Host Interface Connector JP5 CLKI Input Disable Disable CLKI Input CLKI is tied to VSS Disable Crystal Input XCG1 is tied to VSS JP6 Crystal Enable Enable Crystal Output Disable Crystal Output JP7 HIOVDD Volt...

Страница 10: ...d to measure the current consumption of the S1D13700 host interface When the jumper is at position 1 2 normal operation is selected When no jumper is installed host interface current consumption can be measured across JP1 Note The HIOVDD voltage can be selected to be 3 3V or 5V using jumper JP7 Figure 3 2 Configuration Jumper JP1 Location Top View JP1 Normal Operation HIOVDD current measurement ...

Страница 11: ...o measure the current consumption of the S1D13700 LCD panel interface When the jumper is at position 1 2 normal operation is selected When no jumper is installed panel interface current consumption can be measured across JP2 Note The NIOVDD voltage can be selected to be 3 3V or 5V using jumper JP8 Figure 3 3 Configuration Jumper JP2 Location Top View JP2 Normal Operation NIOVDD current measurement...

Страница 12: ...5 07 15 Revision 1 0 JP3 COREVDD JP3 can be used to measure the current consumption of the S1D13700 core When the jumper is at position 1 2 normal operation is selected When no jumper is installed core current consumption can be measured across JP3 Figure 3 4 Configuration Jumper JP3 Location Top View JP3 Normal Operation COREVDD current measurement ...

Страница 13: ... CLKI Source JP4 is used to select the clock source for the S1D13700 CLKI input When the jumper is at position 1 2 the clock source is the on board oscillator U2 When the jumper is at position 2 3 the clock source is from the host interface connector connector P1 pin 4 Figure 3 5 Configuration Jumper JP4 Location Top View JP4 On board oscillator Host interface connector U2 ...

Страница 14: ...3700 clock input that is not used by connecting it to ground When the jumper is at position 1 2 CLKI input is disabled When the jumper is at position 2 3 XCG1 input is disabled Note When jumper JP5 is at position 1 2 jumper JP6 must also be at position 1 2 When jumper JP5 is at position 2 3 jumper JP6 must also be at position 2 3 Figure 3 6 Configuration Jumper JP5 Location Top View JP5 Disable CL...

Страница 15: ...tput XCD1 When the jumper is at position 1 2 XCD1 output is enabled by connecting it to the crystal When the jumper is at position 2 3 XCD1 output is disabled by disconnecting it from the crystal Note When jumper JP6 is at position 1 2 jumper JP5 must also be at position 1 2 When jumper JP6 is at position 2 3 jumper JP5 must also be at position 2 3 Figure 3 7 Configuration Jumper JP6 Location Top ...

Страница 16: ...the voltage for HIOVDD When the jumper is at position 1 2 HIOVDD is 3 3V When the jumper is at position 2 3 HIOVDD is 5V Figure 3 8 Configuration Jumper JP7 Location JP8 NIOVDD Voltage JP8 is used to select the voltage for NIOVDD When the jumper is at position 1 2 NIOVDD is 3 3V When the jumper is at position 2 3 NIOVDD is 5V Figure 3 9 Configuration Jumper JP8 Location Top View JP7 3 3V 5V Top Vi...

Страница 17: ...on 1 0 JP9 RESET Source JP9 is used to select the source of the RESET signal to the S1D13700 When the jumper is at position 1 2 the S1D13700 is reset by the on board reset button SW1 When the jumper is at position 2 3 the S1D13700 is reset by the system connector P1 pin 21 Figure 3 10 Configuration Jumper JP9 Location Top View JP9 Manual reset Host interface reset ...

Страница 18: ...r the maximum cur rent draw of 750mA provided by the PC Card slot may be exceeded If the combination of module and LCD panel exceeds this limit an external 5V power supply may be re quired The 5V regulated power supply may be connected to the 5V test point TP5V1 and the GND test point TPGND1 to power the on board regulator In this case the 0 Ohm resistor R2 must be removed from the board 4 1 2 Hos...

Страница 19: ...see Section 6 Schematic Diagrams on page 23 Note 1 When the board is connected to a PC using the Epson PC Card Extender the signal AS is not used and R12 must NOT be populated AS input of S1D13700 should be connected to HIOVDD by setting the dip switch S1 position 6 to ON 2 When the board is connected to different platforms the Epson PC Card Extender is not used If using MC68K Family Bus interface...

Страница 20: ...ust be connected to ground For details on connecting CLKI or XCG1 to ground refer to the JP5 description see JP6 Crystal Enable on page 15 The default configuration of the S5U13700B00C uses a 32MHz crystal Jumper JP5 is in position 1 2 to connect the CLKI input to ground because it is not used Jumper JP6 is in position 1 2 to connect the XCD1 output to the crystal The board can use the CLKI input ...

Страница 21: ...D GREEN SS TYPE LOW CUR SMD 7 1 F1 MINISMDC110 2 1100mA Raychem Corp Polyswitch Division MINISMDC110 2 POLYSWITCH 1 1A RESET FUSE SMD 8 1 H1 HEADER 8X2 3M ESD 2516 6002UB 9 3 JP1 JP2 JP3 CONN HEADER VERT 2POS 100 TIN or GENERIC 10 6 JP4 JP5 JP6 JP7 JP8 JP9 CONN HEADER VERT 3POS 100 TIN or GENERIC 11 2 P1 P2 Sullins Electronics Corp PRPN202PAEN 12 1 R1 22K CTS Corporation 742C163223JTR RES ARRAY 16...

Страница 22: ... U1 S1D13700_TQ FP13 64 27 1 U2 Oscillator Socket 14 pin narrow DIP screw machine socket 28 1 U3 LT1117CST Linear Technology LT1117CST IC LDO REG ADJUSTBL 800MA SOT223 29 1 U4 SN74LVC2G17 Texas Instruments SN74LVC2G17DBVR IC BUFFER DUAL SHMT TRG SOT 23 6 30 1 U5 TPS3801K33D CKR Texas Instruments TPS3801K33DCKR IC 2 93V SUPPLY MON SOT 323 5 31 1 X1 Crystal32MHz_ MA306 Epson MA 306 32 0000M C0 Table...

Страница 23: ...er Shunt SH1 100 in Jumper Shunt C6 0 1uF C6 0 1uF C1 47uF 10V C1 47uF 10V C7 0 1uF C7 0 1uF C15 0 01uF C15 0 01uF C11 0 01uF C11 0 01uF C23 0 1uF C23 0 1uF C20 47uF 10V C20 47uF 10V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 R1 22K R1 22K A15 62 A14 63 A13 64 A12 2 A11 3 A10 4 A9 5 A8 6 A7 8 A6 9 A5 10 A4 11 A3 13 A2 14 A1 15 A0 16 HIOVDD 7 NIOVDD 22 VSS 33 VSS 28 CNF2 58 CNF3 59 CNF4 60 FPDAT3 18 FP...

Страница 24: ...lock Trace should be as short as possible Isolate Crystal with ground trace Crystal 1 2_Enabled 2 3_Disabled SH7 100 in Jumper Shunt SH7 100 in Jumper Shunt SH6 100 in Jumper Shunt SH6 100 in Jumper Shunt 1 2 3 JP8 NIO Voltage JP8 NIO Voltage SH5 100 in Jumper Shunt SH5 100 in Jumper Shunt R7 100R R7 100R 1 TPP3 3V1 TP_SMT TPP3 3V1 TP_SMT 1 2 C24 100uF 10V T C24 100uF 10V T 1 1 2 2 F1 MINISMDC110 ...

Страница 25: ...Adapter board PC Card Noise Eliminator on WE RD The power supply for the module is pulled in from P1 connector It should be 5V DC regulated 1 2 Manual Reset 2 3 Host Interface Reset 2A 3 2Y 4 U4B SN74LVC2G17 U4B SN74LVC2G17 R10 0 R10 0 R8 NP R8 NP R9 NP R9 NP 2 4 3 1 SW1 SW TACT SPST SW1 SW TACT SPST GND 2 VCC 5 U4C SN74LVC2G17 U4C SN74LVC2G17 1 2 3 JP9 RESET Selector JP9 RESET Selector GND 1 CS8 ...

Страница 26: ...h and Development Vancouver Design Center S1D13700 S5U13700B00C Rev 1 0 Evaluation Board User Manual X42A G 002 01 Issue Date 2005 07 15 Revision 1 0 7 S5U13700B00C Board Layout Figure 7 1 S5U13700B00C Board Layout Top View ...

Страница 27: ...earch and Development Page 27 Vancouver Design Center S5U13700B00C Rev 1 0 Evaluation Board User Manual S1D13700 Issue Date 2005 07 15 X42A G 002 01 Revision 1 0 Figure 7 2 S5U13700B00C Board Layout Bottom View ...

Страница 28: ...3700 S5U13700B00C Rev 1 0 Evaluation Board User Manual X42A G 002 01 Issue Date 2005 07 15 Revision 1 0 8 Connecting the S5U13700B00C to the PC Card Adapter Figure 8 1 Connecting the S5U13700B00C to the PC Card Adapter S5U13700B00C PC Card Adapter Type II PC Card Slot ...

Страница 29: ...ual S1D13700 Issue Date 2005 07 15 X42A G 002 01 Revision 1 0 9 References 9 1 Documents Epson Research and Development Inc S1D13700F01 Hardware Functional Specifica tion document number X42A A 002 xx 9 2 Document Sources Epson Research and Development Website http www erd epson com PC Card Standard March 1997 ...

Страница 30: ...5564 http www epson co jp Hong Kong Epson Hong Kong Ltd 20 F Harbour Centre 25 Harbour Road Wanchai Hong Kong Tel 2585 4600 Fax 2827 4346 http www epson com hk Taiwan Epson Taiwan Technology Trading Ltd 14F No 7 Song Ren Road Taipei 100 Taiwan ROC Tel 02 8786 6688 Fax 02 8786 6677 http www epson com tw Singapore Epson Singapore Pte Ltd No 1 Temasek Avenue 36 00 Millenia Tower Singapore 039192 Tel ...

Страница 31: ...EPROM containing the identifi cation to specify it as an EPSON LCD controller The software driver supplied by Epson will recognize this PC Card as an Epson LCD Controller The power supplies from the PC Card host are passed to the evaluation board headers A resettable PolySwitch fuse 750mA is placed on Vcc to protect the PC Card bus from excessive current consumption If necessary the evaluation boa...

Страница 32: ...s not needed from the PC Card and should be placed in the 16 bit position A 6 Generic 1 2 Bus Switch SW3 selects the control signals between Generic 1 or Generic 2 bus The S5U13700B00C Evaluation Board does not require the setting of this switch and it should be positioned towards the clock X1 location A 7 Epson Evaluation Boards The extender card provides a header to interface to Epson Mobile Gra...

Страница 33: ...U13700B00C Rev 1 0 Evaluation Board User Manual S1D13700 Issue Date 2005 07 15 X42A G 002 01 Revision 1 0 Change Record X42A G 002 01 Revision 1 0 released as revision 1 0 X42A G 002 00 Revision 0 01 initial draft added parts list added schematics added board layout ...

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