Epson RX801SJ, Руководство по применению

Страница: 20 / 39

RX8010 SJ
Page
−
16
ETM37E-06
244.14
µ
s and 65535 hours. This function can stop at one time and is available as a accumulative timer.
After the interrupt occurs, the /IRQ status is automatically cleared .
13.2.2. Related registers for function of fixed-cycle timer interrupt function
Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
1B Timer Counter 0 128 64 32 16 8 4 2 1
1C Timer Counter 1 32768 16384 8192 4096 2048 1024 512 256
1D Extension Register FSEL1 FSEL0 USEL
TE
WADA
TSEL2 TSEL1 TSEL0
1E Flag Register
UF TF AF VLF
1F Control Register TEST STOP UIE TIE AIE TSTP - -
Address [h]
Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
32 IRQ Control - - -
TMPIN
TMPIN TMPIN
TMPIN
FOPIN1 FOPIN0
∗
Before entering operation settings, we recommend first clearing the TE bit to "0" .
∗
When the fixed-cycle timer function is not being used, the fixed-cycle Timer Counter0,1 register can be used as a
RAM register. In such cases, stop the fixed-cycle timer function by writing "0" to the TE and TIE bits.
1) Down counter for fixed-cycle timer ( Timer Counter 1, 0 )
This register is used to set the default (preset) value for the counter. Any count value from 1 (0001 h) to
65535 (FFFFh) can be set.
Be sure to write "0" to the TE bit before writing the preset value.
∗
When TE=0, read out data of timer counter is default(Preset) value.
And when TE=1, read out data of timer counter is just counting value.
But, when access to timer counter data, counting value is not held.
Therefore, for example, perform twice read access to obtain right data, and a way to adopt the case that two
data accorded is necessary.
2) TSEL2, TSEL1, TESL0 bit
The combination of these three bits is used to set the countdown period (source clock) for this function.
TSEL2
( bit 2 )
TSEL1
( bit 1 )
TSEL0
( bit 0 )
Source clock
Auto reset time
tRTN
0 0 0 4096 Hz /Once per 244.14
µ
s 122
µ
s
0 0 1
64 Hz /Once per 15.625 ms 7.813 ms
0 1 0
1 Hz /Once per second 7.813 ms
0 1 1 1/60 Hz /Once per minute 7.813 ms
1 0 0 1/3600 Hz /Once per hour 7.813 ms
∗
1) The /IRQ pin's auto reset time (tRTN) varies as shown above according to the source clock setting.
∗
2) The first countdown shortens than a source clock.
When selected 4,096Hz / 64HZ / 1Hz as a source clock, one period of error occurs at the maximum.
When selected1/60Hz / 1/3600Hz as a source clock, 1Hz of error occurs at the maximum.
The example of the error of the first countdown: A value to preset is 0004h
Cycle error
TE
Designated cycle
Internal source clock
TF Fla g ”0”
⇒
“1”
TF
3 2 1 4 Down counter 4