Epson PhotoPC 3000Z, Руководство по обслуживанию

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EPSON PhotoPC 3000Z Revision A
Operating Principles Circuit 40
NOTE: “---” when sensor read-out
Table 2-2. CCD Pins Explanation
Pin No. Symbol Pin Description Waveform Voltage
1 V
φ
4
Vertical resister transfer clock -7.5V, 0V
2, 3 V
φ
3A,
V
φ
3B
Vertical resister transfer clock -7.5V, 0V, 15V
4 V
φ
2
Vertical resister transfer clock -7.5V, 0V
5, 6 V
φ
1A,
V
φ
1B
Vertical resister transfer clock -7.5V, 0V, 15V
9, 15 GND GND GND 0V
10 V
OUT
Signal output - Approx. 10V
11 V
DD
Circuit power supply DC 15V
12
φ
RG Reset gate clock 12.5V, 16V
13, 20 H
φ
2
Horizontal resister transfer clock 0V, 5V
14, 19 H
φ
1
Horizontal resister transfer clock 0V, 5V
16
φ
SUB Substrate clock DC Approx. 8V
17 C
SUB
Substrate bias DC
Approx. 8V
(Different in each CCD)
18 V
L
Protection transistor bias DC