Epson FX 1170 - B/W Dot-matrix Printer, Руководство по обслуживанию

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2.3.6 Drive Circuit
The drive circuit receives two types of signals; image data and the pulse length control signal.
Image data is created in the CPU, transferred to the gate array, and latched to the The pulse length
control signal is set by the CPU. The pulse length is adjusted referring to the voltage of the +35 V line. These
two types of signals are sent to the to print each dot. Figure 2-29 shows the drive circuit.
C P U
DO--7
P51
GA
DO-7
HDP
HPW
HDN1
HEAD
Q14
Figure 2-29. Drive Circuit
2.3.7 Parallel Interface Circuit
The parallel interface circuit controls the data flow from the host computer. When a STROBE signal is sent
from the host computer, the data is latched into the gate array (E05A66YA). Data is transmitted until a BUSY
signal is automatically sent back to the host computer to stop the data. Then the gate array outputs an
signal to (the interrupt signal port) of the CPU. The CPU then reads the data latched into the gate array
and, on completion of the reading, resets the BUSY signal to enable the host computer to send more data.
Figure 2-30 shows the parallel interface circuit.
E05A66YA
Parallel l/F
STROBE
B U S Y
STB
- - - - - - -
BUSY
CPU
DO-7
Figure 2-30. Parallel Interface Circuit
2-29