
REV.-A
2.3.2 Reset Circuit
The control circuits are initialized when the RESET signal is issued. The reset operation occurs under these
two conditions:
(1) Power on reset
Immediately after the power is turned on, +35
is rapidly generated. Because it takes a moment for the
voltage at ZD2 to reach +31.5 V, the voltage at the DISC terminal on the gate array does not reach +5
until capacitor
is fully charged. A similar integration circuit is provided in the gate array and further
delays the output of the ROUT signal. This low level is used as a reset signal.
(2)
signal reset
The reset signal is also issued when the
signal is sent from the host computer.
Figure 2-25 shows the power on reset circuit.
GA
D I S C R O U T
D 7
R80
I
R79
55 15
C P U
15
RESET
Figure 2-25. Power On Reset Circuit
2-25
Содержание FX 1170 - B/W Dot-matrix Printer
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Страница 5: ... f REVISION SHEET REVISON DATE ISSUED CHANGE DOCUMENT A June 15 1992 1st issue 7 v ...
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